3D Memory Read Voltage Calibration Using Fail-Bit and Temperature Feedback

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Solution Overview

Problem

The read voltage offsets in three-dimensional memory cells due to the effects of use duration and environmental changes, leading to data read errors.

Innovation Solution

A method and apparatus for voltage calibration that involves detecting the target temperature and performing read operations at multiple candidate times to determine a target read voltage offset parameter, adjusting the read voltage based on ambient temperature and read fail bits to eliminate offset effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read voltage is applied to memory cells for data reading, then data can be read from memory cells, but read voltage offsets occur due to use duration and environmental changes causing read errors

Engineering Contradiction:
Improvedata read accuracyVSAvoidread voltage stability
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent performs preliminary calibration operations to determine offset compensation values before actual data reading. The system pre-characterizes the memory cell array by applying different read voltages and determining threshold voltages and offset compensation values in advance, storing these calibration data for later use during normal read operations to compensate for voltage offsets.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the system continuously monitors read operation results and uses calibration data to adjust read voltage dynamically. Based on the stored offset compensation values and actual read conditions, the system feedback-adjusts the read voltage to maintain accurate reading despite temperature changes and wear over time.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If multiple candidate times are used for read operations to determine target read voltage offset, then voltage calibration accuracy is improved, but calibration time and complexity increase

Engineering Contradiction:
Improvevoltage calibration accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs read operations at multiple candidate times (excessive action) to gather sufficient calibration data for accurate offset determination. By conducting readings at different time points during calibration, the system obtains multiple data points that enable more precise characterization of voltage offset behavior, then uses this comprehensive data to establish accurate compensation values.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP4651142A1Voltage calibration method and apparatus, memory and memory system
Publication Date: 2025.11.19 YANGTZE MEMORY TECH CO LTD
  • EP4651142A1 patent drawingFigure 1~2
  • EP4651142A1 patent drawingFigure 3~4
  • EP4651142A1 patent drawingFigure 5~6

AI summary

A method of voltage calibration and apparatus thereof, a memory and a memory system, the method includes: detecting a current target temperature of the memory cell array; performing a read operation on the memory cell array respectively at each of multiple candidate times with a standard read voltage, and obtaining the respective number of the target read fail bits; determining a target read voltage offset parameter according to the target temperature, the number of the target read fail bits, the candidate time, and the stored target offset function, and calibrating the read voltage.