3D Memory Gated Contact Via Structures
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently manufacturing vertical NAND strings with high density and reliability, particularly in forming stable word line contact via structures and connector line structures that maintain electrical connectivity across multiple vertically alternating stacks.
Innovation Solution
The method involves forming a continuous alternating stack of insulating and sacrificial material layers, creating memory stack structures with vertical semiconductor channels, and replacing sacrificial material layers with word line conductive strips, followed by the formation of word line contact via structures and field effect transistors, which are electrically connected through semiconductor channels across different stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If continuous alternating stacks are used to form vertical NAND strings, then manufacturing efficiency is improved, but maintaining stable word line contact via structures across multiple stacks becomes difficult
Solution Approach 1:
The continuous alternating stack is segmented into multiple vertically alternating stacks through the formation of isolation trenches between them. This segmentation allows each stack to have its own isolated word line contact via structures, ensuring stable electrical connectivity while maintaining manufacturing efficiency through the continuous stack formation process.
Solution Approach 2:
Isolation trenches act as intermediary structures between adjacent vertically alternating stacks. These trenches electrically isolate the stacks from each other while allowing word line contact via structures to be formed on top of each stack, ensuring stable electrical connectivity without interference from adjacent stacks.
2Quantity of substance
If high density vertical NAND strings are formed, then memory density is improved, but structural integrity and electrical connectivity across stacks deteriorate
Solution Approach 1:
The high-density vertical NAND strings are segmented into separate vertically alternating stacks with isolation trenches between them. This segmentation maintains structural integrity by preventing stress propagation between adjacent stacks while preserving high memory density through the vertical stacking configuration.
Solution Approach 2:
Multiple vertically alternating stacks are nested within a single continuous alternating stack structure during manufacturing. This nesting approach allows high-density memory formation while maintaining structural integrity through the unified continuous stack formation process followed by segmentation.
3Reliability
If connector line structures are formed to connect word lines across stacks, then electrical connectivity is improved, but manufacturing complexity increases
Solution Approach 1:
The connector line structures are extracted and formed separately as distinct elements that connect to word line contact via structures on different vertically alternating stacks. This extraction approach simplifies manufacturing by allowing independent formation and alignment of connector lines rather than integrating them into the complex multi-stack structure.
Solution Approach 2:
Word line contact via structures are formed preliminarily on top of each vertically alternating stack before forming the connector line structures. This preliminary action simplifies subsequent manufacturing steps by providing pre-positioned contact points for the connector lines, reducing alignment complexity.
Data Source
AI summary
A three-dimensional memory device includes laterally spaced apart vertically alternating stacks of insulating strips and word line electrically conductive strips located over a substrate, memory stack structures extending through the multiple vertically alternating stacks, word line contact via structures contacting a top surface of the respective word line electrically conductive strips, field effect transistors overlying the word line contact via structures, and connector line structures which are electrically connected to respective subsets of the word line electrically conductive strips in different vertically alternating stacks through the field effect transistors.