3D Memory Gate Leakage Control via Doped Silicate Glass Pillars

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Solution Overview

Problem

Current three-dimensional memory devices face challenges in effectively controlling gate-induced drain leakage current, which affects the performance and reliability of NAND string memory devices.

Innovation Solution

The development of a three-dimensional memory device structure comprising a source contact layer, an alternating stack of insulating and conductive layers, memory openings filled with a memory film, a semiconductor channel, and doped silicate glass pillars, along with a method of manufacturing that involves forming memory openings, depositing layer stacks, and replacing sacrificial material layers with conductive layers to control gate-induced drain leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional three-dimensional memory device structures are used, then manufacturing is simpler, but gate-induced drain leakage current cannot be effectively controlled

Engineering Contradiction:
Improvecontrol of gate-induced drain leakage currentVSAvoidmemory device structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device structure is segmented into distinct functional regions including alternating stacks of insulating and conductive layers, memory openings with fill structures, and source contact layers. This segmentation allows independent optimization of each component to control gate-induced drain leakage while maintaining manufacturability through modular fabrication processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the memory device are assigned different material properties and structural characteristics tailored to their specific functions. For example, doped silicate glass pillars are placed in specific locations to control leakage, while alternating stacks provide insulation and conduction paths in different areas. This local differentiation enables precise control of leakage current without requiring complete structural redesign.

Inventive Principle:
Principle #3Local quality

2Reliability

If doped silicate glass pillars are added to control leakage, then leakage current is reduced, but manufacturing process becomes more complex

Engineering Contradiction:
Improveleakage current controlVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Doped silicate glass pillars are formed as part of the memory opening fill structures during the initial fabrication sequence, before subsequent processing steps. This preliminary formation integrates the leakage control feature into the base manufacturing flow rather than requiring separate addition steps, thereby reducing overall process complexity despite the added functional requirement.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The doped silicate glass pillars serve as intermediary structures that facilitate leakage control while being compatible with standard semiconductor fabrication processes. These pillars act as a mediating element between the source contact layer and the alternating stacks, providing leakage control through their material properties without requiring fundamentally new manufacturing capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If alternating stacks of insulating and conductive layers are used, then memory cell functionality is improved, but device structure becomes more complex

Engineering Contradiction:
Improvememory cell performanceVSAvoidlayer stack structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The alternating stacks of insulating and conductive layers serve multiple functions simultaneously: they provide electrical insulation between adjacent memory cells, establish conduction paths for memory operation, and form the structural framework for integrating other components like memory opening fill structures. This multi-functionality improves memory cell performance while avoiding the need for separate dedicated structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple functional requirements are merged into the alternating stack structure. The insulating layers and conductive layers are combined in a repeating pattern that simultaneously provides isolation, conduction, and structural support. This merging of functions into a single integrated structure reduces overall device complexity compared to having separate structures for each function.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces gate-induced drain leakage current, enhancing the performance and reliability of three-dimensional NAND string memory devices by optimizing the structure and manufacturing process.

Implementation Method 1

converting a lower portion of each semiconductor channel into a source region by outdiffusing dopants from the doped silicate glass pillars to adjacent portions of the semiconductor channels

Methodology Applied
Scientific EffectDopant diffusion: Diffusion

Data Source

PatentUS11121153B1Three-dimensional memory devices containing structures for controlling gate-induced drain leakage current and method of making the same
Publication Date: 2021.09.14 SANDISK TECHNOLOGIES LLC
  • US11121153B1 patent drawing
  • US11121153B1 patent drawing
  • US11121153B1 patent drawing

AI summary

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. A layer stack including a charge storage layer, a tunneling dielectric layer, a semiconductor material layer, and a dielectric material layer is formed in the memory openings. The dielectric material layer may include a doped silicate glass layer. A doped silicate glass pillar can be formed at a bottom portion of each memory opening, and a bottom portion of the semiconductor material layer can be converted into a source region by outdiffusion of dopants from the doped silicate glass pillar. Alternatively, the semiconductor material layer can be heavily doped, and can be recessed to form a source region.