3D Semiconductor Memory Devices With Horizontal Isolation Patterns
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Solution Overview
Problem
Two-dimensional semiconductor devices face limitations in integration density due to the high cost and complexity of forming fine patterns, necessitating the development of three-dimensional semiconductor memory devices with improved reliability and integration density.
Innovation Solution
A three-dimensional semiconductor memory device is designed with a stack structure including isolation trenches and a horizontal isolation pattern that divides the upper stack structure, enhancing integration density and reliability by optimizing the arrangement of electrode layers and selection lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional planar semiconductor devices are used to increase integration density, then manufacturing cost increases due to the need for extremely high-priced apparatuses to form fine patterns
Solution Approach 1:
The patent transitions from two-dimensional planar semiconductor devices to three-dimensional vertically stacked memory structures. By stacking multiple memory cell layers vertically, the device achieves higher integration density without requiring extremely fine horizontal patterning, thereby avoiding the need for extremely high-priced patterning apparatuses while maintaining manufacturability
2Quantity of substance
If three-dimensional stacked memory structures are implemented, then integration density increases, but device complexity increases due to the need for multiple isolation trenches and horizontal isolation patterns
Solution Approach 1:
The patent divides the three-dimensional memory structure into multiple independently formable layers and components. The isolation structure is segmented into vertical isolation trenches and horizontal isolation patterns that can be formed through separate processing steps, allowing for modular manufacturing and reducing overall structural complexity
Solution Approach 2:
The patent applies different isolation structures at different locations within the device. Vertical isolation trenches are used at specific positions while horizontal isolation patterns are applied in other regions, optimizing the balance between electrical isolation performance and manufacturing complexity by using localized rather than universal isolation approaches
Data Source
AI summary
A three-dimensional semiconductor memory device includes a stack structure disposed on a substrate and including lower and upper stack structures, first and second isolation trenches defining the stack structure, extending in a first direction, and spaced apart from each other in a second direction, a middle isolation trench penetrating the upper stack structure between the first and second isolation trenches and extending in the first direction, and a horizontal isolation pattern connected to the middle isolation trench and dividing the upper stack structure in the second direction. The horizontal isolation pattern includes horizontal isolation portions, each of which extends in the first direction and is offset from an extension line of the middle isolation trench in the second direction or an opposite direction to the second direction.