3D Semiconductor Memory Device Insulating Separation Pattern
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Solution Overview
Problem
Two-dimensional semiconductor devices face limitations in integration density due to expensive process equipment needed for fine pattern formation, leading to high costs and reduced performance, prompting the need for three-dimensional semiconductor memory devices with enhanced reliability and integration density.
Innovation Solution
A three-dimensional semiconductor memory device design featuring a first and second block on a substrate with a source layer and insulating separation patterns, including a line portion and a protruding portion, where a source contact plug penetrates the protruding portion to electrically connect the source layer, and through vias connect the blocks, allowing for alternately stacked electrode layers and electrode interlayer insulating layers, enhancing integration density and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional semiconductor devices use fine pattern formation to increase integration density, then integration density is improved, but process equipment cost increases significantly
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically stacked memory cells. Multiple electrode layers are stacked in the vertical direction (third direction) to form multiple memory cell layers, enabling integration density improvement without requiring finer lateral patterning. This dimensional change allows achieving higher integration density while avoiding the need for expensive fine pattern formation equipment.
2Reliability
If three-dimensional memory devices are designed with complex insulating separation patterns and contact plugs, then reliability is improved, but device complexity increases
Solution Approach 1:
The insulating separation pattern is divided into multiple functional portions: a first portion extending in the first direction to separate adjacent memory blocks, and a second portion extending in the second direction to provide additional isolation. This segmentation allows each portion to perform its specific function efficiently, improving reliability through better electrical isolation while maintaining a systematic and manageable structural complexity.
Solution Approach 2:
The insulating separation pattern acts as an intermediary element between adjacent memory blocks and between different electrical components. It provides electrical isolation and prevents unwanted interactions between neighboring structures, thereby improving device reliability without requiring direct modification of the memory cell structures themselves.
3Reliability
If source contact plugs penetrate insulating separation patterns to connect source layer, then electrical connectivity is improved, but process precision requirements increase
Solution Approach 1:
The insulating separation pattern is formed first, providing a predefined structure with designated regions for contact plug formation. The source contact plugs are then formed to penetrate this pre-existing insulating pattern, allowing the insulating structure to guide and define the contact plug positions. This preliminary formation of the insulating pattern simplifies subsequent alignment processes and reduces manufacturing precision requirements.
Solution Approach 2:
The insulating separation pattern serves a dual function: it provides electrical isolation between memory blocks and simultaneously defines the positioning structure for source contact plugs. The pattern's geometry and placement automatically guide the contact plug formation process, eliminating the need for separate alignment reference structures and simplifying the manufacturing process.
Data Source
AI summary
A three-dimensional semiconductor memory device includes; a first block and a second block arranged on a first substrate in a first direction, wherein each of the first block and the second block includes electrode layers stacked on the first substrate, a source layer interposed between the first block and the first substrate, and between the second block and the first substrate, a first insulating separation pattern interposed between the first block and the second block and extending in the first direction, wherein the first insulating separation pattern includes a line portion and a protruding portion, the line portion extending in a second direction crossing the first direction, and the protruding portion having a width greater than a width of the line portion, a first source contact plug penetrating the protruding portion of the first insulating separation pattern to electrically connect the source layer, and at least one through via penetrating the source layer and at least one of the first block and the second block.