3D Memory Stacked Structures Inter-Metal Routing
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Solution Overview
Problem
The complexity of manufacturing processes and internal connections in three-dimensional flash memory devices makes it challenging to achieve a compact and efficient design, particularly in connecting multi-stack memory structures with peripheral circuits.
Innovation Solution
The design involves a memory device with a substrate, multiple stacked memory structures, and inter-metal layers that electrically connect word lines and pillars across different layers, allowing connections to the peripheral circuit through both an inter-metal layer and an upper metal layer, reducing the complexity of internal lines and enhancing compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a three-dimensional structure is used to increase integration degree, then storage capacity is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent transitions from planar two-dimensional memory structures to three-dimensional stacked structures, where multiple memory stacks are arranged vertically. This dimensional change enables increased storage capacity within the same footprint area while the inter-metal layers provide systematic routing to manage the added complexity of three-dimensional interconnections.
2Quantity of substance
If multiple stacked memory structures are used to increase integration, then device density is improved, but internal connection complexity increases
Solution Approach 1:
The patent divides the memory device into multiple independent stacked structures, each with its own set of word lines and interconnections. The inter-metal layers segment the routing paths, allowing connections to be organized by functional blocks rather than requiring complex long-distance interconnections across the entire device, thereby reducing internal connection complexity.
Solution Approach 2:
The inter-metal layers serve as intermediary connection structures between the stacked memory structures and the peripheral circuits. These intermediate layers provide a systematic routing mechanism that simplifies the connection process, acting as mediators that organize and manage the electrical pathways between different functional blocks without requiring direct complex interconnections.
3Reliability
If inter-metal layers are added to connect stacked structures, then electrical connectivity is improved, but manufacturing steps increase
Solution Approach 1:
The inter-metal layers are designed to serve multiple functions simultaneously: they provide electrical connectivity between stacked memory structures, serve as routing pathways for control signals and data, and act as structural support layers. This multi-functionality reduces the need for additional dedicated layers, thereby limiting the increase in manufacturing steps despite the added connectivity requirements.
Data Source
AI summary
A memory device includes a substrate, a first memory structure including a plurality of first word lines stacked on the substrate in a direction perpendicular to a top surface of the substrate, an inter-metal layer on the first memory structure and including a plurality of intermediate pads connected with separate, respective first word lines of the plurality of first word lines, a second memory structure including a plurality of second word lines stacked on the inter-metal layer in the direction perpendicular to the top surface of the substrate, and an upper metal layer on the second memory structure and including a plurality of upper pads connected with separate, respective second word lines of the plurality of second word lines.