3D Memory Isolation Structure Preventing Impurity Diffusion
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Solution Overview
Problem
Three-dimensional memory devices face challenges in high-temperature processing, leading to undesirable diffusion of the common source region during implantation, causing pinch-off in the N+ region and making batch erasure of the substrate hole difficult due to the high-density integration process.
Innovation Solution
A method involving the formation of an isolation structure between the common source region and the substrate using an L-shaped silicon dioxide structure to prevent impurity diffusion, allowing for the separation of electrons and holes during programming and erasing states, enhancing erasing efficiency and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If high-temperature process is used in the fabrication of the memory device, then the semiconductor manufacturing process can be completed, but undesirable diffusion occurs during the implantation of the common source region, resulting in pinch-off in the N+ region
Solution Approach 1:
An isolation structure comprising an isolation layer and an isolation capping layer is introduced as an intermediary between the common source region and the substrate. This mediator prevents direct interaction between the common source region and the substrate during high-temperature processing, thereby blocking the diffusion path of impurities while allowing the fabrication process to proceed at required temperatures.
Solution Approach 2:
The isolation structure is extracted or removed after serving its protective function during fabrication. The method includes removing the isolation structure after forming the common source region, eliminating the mediator once it has fulfilled its purpose of preventing diffusion during the critical fabrication stages.
2Productivity
If high-density integration process is used to increase storage nodes, then more storage nodes are obtained in the same chip area, but batch erasure of the substrate hole becomes difficult due to pinch-off
Solution Approach 1:
The isolation structure acts as a mediator that enables high-density integration while preserving batch erasure capability. By preventing impurity diffusion, it maintains the electrical integrity of the N+ region, allowing holes to be properly erased from the substrate even in high-density configurations where pinch-off would normally occur.
3Reliability
If the isolation structure is formed using L-shaped structure, then impurity diffusion is effectively blocked, but the fabrication process complexity increases
Solution Approach 1:
The isolation layer and isolation capping layer are formed with specific thickness parameters (first thickness and second thickness respectively) that are optimized to provide effective diffusion blocking. By carefully controlling these dimensional parameters, the L-shaped structure achieves superior impurity prevention while managing fabrication complexity through parameter optimization rather than structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The isolation structure effectively inhibits impurity diffusion, preventing operational failures and improving the efficiency of writing, reading, and erasing processes in three-dimensional memory devices by ensuring spatial separation of electrons and holes.
Implementation Method 1
undesirable diffusion during the implantation of the common source region
Implementation Method 2
growing a semiconductor material using an epitaxial or deposition process
Implementation Method 3
alternately depositing a silicon dioxide layer and a gate structure layer for a plurality of times to form a multi-layer dielectric film
Data Source
AI summary
A three-dimensional memory device and method of manufacturing the same, an isolation structure is embedded between the common source region and the substrate thereunder, which can inhibit the undesired diffusion of impurities during the implantation of the common source region, avoiding operation failure due to excessive diffusion of impurities. In programming and reading states of the three-dimensional memory device, electrons flow from the common source region to bit line; while in erase states, holes are injected from the substrate. Due to the isolation structure, the three-dimensional memory device achieves spatial separation of electrons from holes required for programming/erasing, improving the erasing efficiency and the integration as well.