3D Memory Layout With Horizontal Channels and Isolation Pillars
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in achieving high-density storage with efficient horizontal semiconductor channels, as existing technologies struggle to effectively integrate horizontal semiconductor channels within a vertically alternating sequence of insulating and composite layers while maintaining reliable electrode and isolation structures.
Innovation Solution
The solution involves forming a vertically alternating sequence of vertically-perforated insulating and composite layers with horizontal semiconductor channel strips between elongated openings, accompanied by laterally alternating sequences of insulated electrode structures and dielectric isolation pillar structures, which are integrated through a specific manufacturing process involving multiple layers and etching steps to create a high-density memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If horizontal semiconductor channels are integrated within vertically alternating insulating and composite layers, then storage density is improved, but manufacturing complexity increases
Solution Approach 1:
The device is divided into vertically alternating insulating layers and composite layers, with each composite layer containing horizontal semiconductor channel strips segmented between elongated openings. This segmentation allows for systematic integration of multiple storage elements while maintaining manufacturability through repeated patterning cycles.
Solution Approach 2:
The patent transitions from traditional vertical channel structures to horizontal semiconductor channels embedded within layered composite structures. This dimensional reconfiguration enables higher storage density by utilizing horizontal space between elongated openings while maintaining vertical layering for manufacturing efficiency.
2Manufacturing precision
If laterally alternating sequences of electrode structures and isolation pillar structures are formed, then electrode placement precision is improved, but device complexity increases
Solution Approach 1:
The electrode structures are segmented into laterally alternating sequences with dielectric isolation pillar structures positioned between them. This segmentation enables precise electrode placement by isolating each electrode structure while maintaining a regular, manufacturable pattern throughout the device.
Solution Approach 2:
Dielectric isolation pillar structures serve as intermediary elements positioned between laterally alternating electrode structures. These isolation pillars provide precise spatial definition and electrical isolation, enabling accurate electrode placement while simplifying the overall manufacturing process through a modular alternating pattern.
3Productivity
If horizontal semiconductor channel strips are positioned between neighboring elongated openings, then channel efficiency is improved, but manufacturing difficulty increases
Solution Approach 1:
The composite layers serve multiple functions: they contain horizontal semiconductor channel strips for efficient charge transport, provide structural support, and define the spacing between elongated openings. This multi-functionality achieves channel efficiency while maintaining manufacturing simplicity through a unified layer structure.
Solution Approach 2:
The horizontal semiconductor channel strips are pre-positioned within composite layers before final assembly, with each strip already correctly located between neighboring elongated openings. This preliminary positioning ensures optimal channel efficiency while reducing manufacturing difficulty by eliminating complex post-assembly alignment steps.
Data Source
AI summary
A method of forming three-dimensional memory device includes forming an alternating stack of insulating layers and semiconductor material layers over a substrate, and forming laterally alternating sequences of laterally-insulated electrode structures and dielectric isolation pillar structures through the alternating stack. At least a portion of the laterally-insulated electrode structures each include a memory film and a word line electrode.


