3D Memory Gate Stack With Horizontal Conductive Layer for Leakage Control
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing data storage capacity effectively, particularly in implementing three-dimensionally arranged memory cells to enhance storage capabilities.
Innovation Solution
A semiconductor device with a gate stacking structure comprising alternating gate electrodes and insulation layers, a channel structure crossing the insulation portion, and a horizontal conductive layer made of a doped monocrystalline semiconductor layer, which includes a first and second conductivity type region for improved performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensionally arranged memory cells are implemented to increase data storage capacity, then storage capacity is improved, but device complexity increases
Solution Approach 1:
The patent transitions from two-dimensional memory cell arrangement to three-dimensional arrangement by stacking multiple gate electrodes and insulation layers vertically. The channel structure extends in the cross direction through the stacked gate electrodes, enabling vertical stacking of memory cells to increase storage capacity without increasing planar area.
Solution Approach 2:
The memory device is segmented into multiple gate electrodes (first gate electrode, second gate electrode, third gate electrode) stacked vertically, with insulation layers between them. This segmentation allows independent control of different memory cell layers, managing the complexity of three-dimensional arrangement through modular structure.
2Reliability
If doped monocrystalline semiconductor layer with distinct conductivity regions is used, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The horizontal conductive layer is divided into distinct conductivity type regions (first conductivity type and second conductivity type) within the same layer. This local quality differentiation enables improved reliability by stabilizing current flow in specific regions while reducing leakage currents in others, without requiring complete redesign of the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables increased data storage capacity and improved performance by stabilizing current flow and reducing leakage currents through the use of a doped monocrystalline semiconductor layer with distinct conductivity regions, enhancing the reliability and efficiency of the semiconductor device.
Implementation Method 1
a horizontal conductive layer connected to the channel structure between the insulation portion and the gate stacking structure and including a doped monocrystalline semiconductor layer having a dopant
Data Source
AI summary
A semiconductor device includes a gate stacking structure including alternating gate electrodes and insulation layers on an insulation portion, a channel structure crossing the insulation portion and extending through the gate stacking structure, and a horizontal conductive layer connected to the channel structure between the insulation portion and the gate stacking structure, the horizontal conductive layer including a doped monocrystalline semiconductor layer having a dopant.