3D NAND Memory Leakage Detection Using Dummy Vertical Channels
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Solution Overview
Problem
Highly integrated two-dimensional semiconductor memory devices face limitations in integration due to expensive processing equipment needed for fine pattern formation, prompting the development of three-dimensional semiconductor memory devices, which require effective methods to detect electrical failures.
Innovation Solution
A three-dimensional semiconductor memory device with a substrate having distinct conductivity regions and stack structures, including vertical channels and dummy vertical channels, allows for the application of test and discrimination voltages to determine if and where leakage currents occur, distinguishing between cell array and extension regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional semiconductor memory devices are developed to increase integration, then integration density is improved, but difficulty of detecting and measuring electrical failures increases
Solution Approach 1:
The substrate is divided into distinct regions: a cell array region containing transistors with a first threshold voltage and an extension region containing transistors with a second threshold voltage. This segmentation allows independent testing of each region by applying different voltages, thereby simplifying electrical failure detection in the high-density three-dimensional structure
Solution Approach 2:
A discrimination voltage is introduced as an intermediary testing parameter that falls between the first and second threshold voltages. This intermediary voltage enables selective activation of transistors in different regions, allowing the detection system to isolate and identify leakage currents in specific areas without interference from other regions
2Measurement precision
If discrimination voltage between threshold voltages is applied to locate leakage current, then measurement precision is improved, but device complexity increases
Solution Approach 1:
Different voltage characteristics are assigned to different regions: the cell array region has transistors with a first threshold voltage while the extension region has transistors with a second threshold voltage. This local quality differentiation enables precise localization of leakage currents by observing which region responds to the discrimination voltage, improving measurement precision without requiring complex external testing equipment
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables easy detection of electrical failures and localization of leakage currents, thereby increasing manufacturing yield by identifying and addressing failure points in the three-dimensional semiconductor memory device.
Implementation Method 1
a stack structure on the substrate, the stack structure including stacked electrodes; an electrical vertical channel penetrating the stack structure on the cell array region
Data Source
AI summary
Disclosed are three-dimensional semiconductor memory devices and methods of detecting electrical failure thereof. The three-dimensional semiconductor memory device includes a substrate with a first conductivity including a cell array region and an extension region having different threshold voltages from each other, a stack structure on the substrate and including stacked electrodes, an electrical vertical channel penetrating the stack structure on the cell array region, and a dummy vertical channel penetrating the stack structure on the extension region. The substrate comprises a pocket well having the first conductivity and provided with the stack structure thereon, and a deep well surrounding the pocket well and having a second conductivity opposite to the first conductivity.