3D Memory Channel Structure With Local Doping for Lower Resistance
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Solution Overview
Problem
The challenge in 3D memory devices is the high contact resistance and sheet resistance due to the use of intrinsic semiconductor materials, which affects the electric performance, particularly when forming sidewall selective epitaxial growth (SEG) in advanced 3D NAND memory technologies with multiple levels and a multi-deck architecture.
Innovation Solution
The solution involves partially in situ doping the semiconductor channel, with a higher doping concentration at the source contact to reduce the potential barrier, and using an enlarging structure as a doping source during thermal processes, along with a conductive layer to connect the exposed doped parts of the semiconductor channels, thereby reducing contact and sheet resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If intrinsic semiconductor materials are used to maintain the intrinsic nature of the semiconductor channel, then the memory cell functionality is preserved, but contact resistance and sheet resistance increase significantly
Solution Approach 1:
The patent applies local quality by implementing selective in-situ doping only in specific regions of the semiconductor channel (source and drain regions) while leaving the central channel region undoped. This creates spatially varying doping concentrations where highly doped source/drain regions provide low contact resistance, while the intrinsic central channel maintains proper memory cell functionality. The enlarging structure serves as a localized doping source that achieves this spatial differentiation.
Solution Approach 2:
The patent employs preliminary action by forming the enlarging structure (doping source) before the actual doping process. This enlarging structure is prepared in advance to serve as the dopant source during subsequent thermal processing, enabling controlled in-situ doping of the semiconductor channel regions that require it while preserving the intrinsic nature of other regions.
2Object-affected harmful factors
If doping concentration is increased to reduce contact resistance, then electrical connections improve, but the intrinsic nature of the semiconductor channel is compromised
Solution Approach 1:
The patent implements local quality by creating non-uniform doping distribution where high doping concentrations are applied only to source and drain regions for low contact resistance, while the central channel region remains undoped to maintain its intrinsic properties essential for memory cell operation. This spatial differentiation resolves the contradiction between needing high doping for electrical connections and maintaining intrinsic nature for functionality.
Solution Approach 2:
The patent applies partial action by performing in-situ doping only in specific portions of the semiconductor channel (source and drain regions) rather than uniformly throughout the entire channel. This partial doping approach provides sufficient doping concentration where needed for low contact resistance while avoiding excessive doping in the central channel region that would compromise the intrinsic nature required for proper memory cell function.
3Object-affected harmful factors
If uniform doping is applied throughout the semiconductor channel, then contact resistance is reduced, but sheet resistance and memory cell performance deteriorate
Solution Approach 1:
The patent applies local quality by implementing spatially selective doping where source and drain regions receive high doping concentrations for low contact resistance, while the central channel region remains undoped to maintain proper memory cell performance characteristics. This localized approach prevents the sheet resistance deterioration that would result from uniform doping across the entire channel.
Solution Approach 2:
The patent uses partial action by limiting the in-situ doping process to only the source and drain regions rather than applying it uniformly across the entire semiconductor channel. This partial doping strategy achieves low contact resistance at critical interfaces while avoiding the excessive doping in the central channel that would degrade memory cell performance and increase sheet resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the electric performance of 3D memory devices by lowering contact resistance and sheet resistance, enhancing the overall electrical connections and maintaining the intrinsic nature of the semiconductor channel in memory cells.
Implementation Method 1
using an enlarging structure as a doping source during thermal processes
Implementation Method 2
along with a conductive layer to connect the exposed doped parts of the semiconductor channels, thereby reducing contact and sheet resistance
Data Source
AI summary
A 3D memory device includes a memory stack including interleaved stack conductive layers and stack dielectric layers, a semiconductor layer, and a channel structure extending vertically through the memory stack into the semiconductor layer. A first lateral dimension of a first portion of the channel structure facing the semiconductor layer is greater than a second lateral dimension of a second portion of the channel structure facing the memory stack. The channel structure includes a memory film and a semiconductor channel A first doping concentration of part of the semiconductor channel in the first portion of the channel structure is greater than a second doping concentration of part of the semiconductor channel in the second portion of the channel structure.