3D Memory-Logic Package Layout for High Bandwidth in Small Footprints
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Solution Overview
Problem
The integration of logic and DRAM dies in a single integrated circuit package faces challenges in maintaining a small form factor while achieving the high bandwidth required for data flow, particularly in edge AI devices where large amounts of data are processed locally.
Innovation Solution
A 3D integrated circuit package design with a hybrid-bonded stack of DRAM dies, where each die has its active surface facing a redistribution layer, and through-mold vias and through-silicon vias are used to enhance connectivity, along with a hybrid bonding layer to connect successive dies, allowing for efficient data flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If logic die and DRAM dies are integrated into a single package, then data bandwidth between logic and memory is improved, but package form factor increases
Solution Approach 1:
The patent transitions from a 2D side-by-side arrangement of logic and memory dies to a 3D stacked configuration. Multiple DRAM dies are vertically stacked above the logic die, utilizing the vertical dimension to increase data bandwidth through multiple simultaneous connections while maintaining a compact footprint. The through-mold vias extend vertically through the stack to enable high-bandwidth data paths without expanding the horizontal package area.
Solution Approach 2:
The patent implements a nested structure where multiple DRAM dies are stacked vertically, with each die containing memory arrays and interconnect structures. The through-mold vias are nested within the mold compound that encapsulates the entire stack, creating a compact integrated structure. This nesting allows multiple functional layers to occupy overlapping spatial volumes, maximizing data bandwidth while minimizing overall package size.
2Ease of manufacture
If through-mold vias are used to connect logic die to memory dies, then manufacturing complexity is reduced, but via formation precision requirements increase
Solution Approach 1:
The through-mold vias are formed in the mold compound before the logic die and memory dies are stacked and bonded together. This preliminary via formation allows the vias to be created while the mold compound is still in a workable state, enabling subsequent die stacking and bonding operations to proceed without disturbing the via structures. This sequencing simplifies manufacturing by avoiding complex post-assembly via formation processes.
Solution Approach 2:
The mold compound serves as an intermediary material that provides a matrix for forming through-mold vias. These vias act as conductive pathways that electrically connect the logic die to the stacked memory dies. The mold compound encapsulates and protects the vias while allowing precise electrical connections to be established through the entire stack, bridging the gap between different die layers without requiring direct die-to-die via formation.
Data Source
AI summary
An integrated circuit package is provided in which a hybrid-bonded stack of memory dies couples through a plurality of through-mold vias to a redistribution layer. A logic die couples to the redistribution layer through a plurality of interconnects.