3D Semiconductor Memory Device With Magnetic Tunnel Junctions
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Solution Overview
Problem
Conventional two-dimensional semiconductor memory elements face limitations in degree of integration due to the cost and complexity of miniaturization technologies, necessitating the development of three-dimensional semiconductor memory devices.
Innovation Solution
A three-dimensional semiconductor memory device is designed with a stacked structure of horizontal conductive lines and vertical conductive lines, incorporating magnetic tunnel junction patterns to enhance electrical characteristics and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If two-dimensional/planar semiconductor memory elements are used, then manufacturing process is simpler, but degree of integration is limited
Solution Approach 1:
The patent transitions from two-dimensional planar memory elements to three-dimensional stacked memory structures. Multiple memory cell layers are vertically stacked with conductive lines extending in first, second, and third directions, enabling higher degree of integration by utilizing the vertical dimension in addition to the horizontal plane.
2Quantity of substance
If photolithography miniaturization is used to increase integration, then degree of integration improves, but manufacturing cost increases
Solution Approach 1:
Instead of continuing to miniaturize patterns in two dimensions using expensive photolithography, the patent stacks multiple memory cell layers vertically in the third direction. This approach increases integration density by utilizing vertical space rather than relying solely on horizontal pattern miniaturization, thereby avoiding the need for ultra-expensive miniaturization apparatuses.
3Quantity of substance
If three-dimensional stacked structure is implemented, then degree of integration increases, but electrical characteristics may deteriorate
Solution Approach 1:
The patent divides the three-dimensional structure into multiple distinct memory cell layers, each with its own set of conductive lines and magnetic tunnel junctions. The conductive lines are segmented into first, second, and third directional lines that are selectively connected, allowing independent optimization of electrical paths for each layer while maintaining overall high integration.
Solution Approach 2:
The patent implements different conductive line configurations for different spatial directions. First conductive lines extend in a first direction, second conductive lines extend in a second direction, and third conductive lines extend in a third direction, with each set optimized for its specific function and location within the stacked structure, thereby maintaining good electrical characteristics throughout the three-dimensional array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed device achieves improved electrical characteristics and reliability by increasing the degree of integration beyond the limitations of two-dimensional designs, while maintaining cost-effectiveness.
Implementation Method 1
a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the plurality of first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive line and each of the second horizontal conductive lines
Data Source
AI summary
A three-dimensional semiconductor memory device is provided. The semiconductor memory device includes first horizontal conductive lines on a substrate in a first direction, each of the first horizontal conductive lines extending in a second direction different from the first direction, second horizontal conductive lines stacked on the substrate in the first direction, each of the second horizontal conductive lines extending in the second direction, a vertical conductive line between the first horizontal conductive line and the second horizontal conductive line and extending in the first direction, a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive lines and each of the second horizontal conductive lines. The first horizontal conductive lines and the second horizontal conductive lines are spaced apart from each other in a third direction.