3D Memory Configurable Processor for Fast Math Function Computing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional processors are limited in implementing complex mathematical functions due to hardware constraints, relying on software computation which is slow and inefficient, and existing configurable processors can only implement a small number of fixed mathematical functions.
Innovation Solution
A configurable processor with a 3D memory array storing look-up tables of mathematical functions and an arithmetic logic circuit for performing arithmetic operations, allowing for the implementation of a wide range of complex mathematical functions through memory-based computing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional processors use logic-based computing for mathematical functions, then hardware implementation is simple, but computational speed and efficiency are slow
Solution Approach 1:
The patent replaces traditional logic-based computing mechanisms with a memory-based computing system. A 3D memory array stores pre-computed mathematical function results, and an arithmetic logic circuit retrieves and processes these results directly from memory, eliminating the need for complex sequential logic operations and significantly improving computational speed.
Solution Approach 2:
The patent pre-computes and stores mathematical function results in a 3D memory array before runtime. This preliminary action allows the system to retrieve pre-computed values during operation rather than calculating them in real-time, dramatically accelerating computational performance for mathematical functions.
2Productivity
If processors implement more mathematical functions in hardware, then computational density increases, but hardware resources are limited
Solution Approach 1:
The patent transitions from two-dimensional planar memory structures to three-dimensional stacked memory architecture. This dimensional change increases storage capacity and computational density without proportionally increasing the footprint area, allowing more mathematical functions to be implemented within the same hardware footprint.
Solution Approach 2:
The patent creates a universal computational platform where a single 3D memory array and arithmetic logic circuit can perform multiple mathematical functions by storing different sets of pre-computed values. This multi-functional design allows the same hardware resources to serve various computational needs, increasing effective computational density.
3Adaptability or versatility
If configurable processors use fixed mathematical functions, then hardware implementation is straightforward, but adaptability to different functions is limited
Solution Approach 1:
The patent implements a dynamic configuration system where the 3D memory array can be programmed with different mathematical function data sets. The arithmetic logic circuit can be reconfigured through control signals to perform different operations, allowing the hardware to adapt to various computational requirements without physical redesign.
Solution Approach 2:
The patent enables function configurability by changing the data stored in the 3D memory array and the control parameters of the arithmetic logic circuit. By modifying these parameters (memory contents and control signals), the system can switch between different mathematical functions, providing high adaptability without increasing hardware complexity.
Data Source
AI summary
A configurable processor comprises at least an array of configurable computing elements (CCE's). Each CCE comprises at least a three-dimensional (3-D) memory (3D-M) array; an arithmetic logic circuit (ALC); and, a plurality of inter-storage-processor (ISP) connections. Not penetrating through any semiconductor substrate, the ISP-connections are short, small and numerous.