3D Solid-State Memory Cell Addressing With MESFET Selectors
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Solution Overview
Problem
Existing three-dimensional phase change memory (PCM) arrays face challenges in addressing PCM cells in the middle of the array due to the limitations of selecting devices, which require significant surface area and overhead wiring, making it difficult to extend the concept from two-dimensional to three-dimensional arrays.
Innovation Solution
A three-dimensional solid-state memory cell arrangement using a three-terminal device with specific electrical connectors and a method of addressing memory cells by applying electrical currents to these connectors, allowing for minimal surface area usage and reduced overhead wiring, utilizing macro cells with insulating spacers and MESFETs to enable efficient access to PCM cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a selecting device (transistor or diode) is added to each PCM device in a cross-point array, then individual addressing of PCM cells is enabled, but the surface area and wiring overhead increase significantly
Solution Approach 1:
The patent merges the PCM cell and heater into a single cross-point intersection, eliminating the need for separate selecting devices at each intersection. The PCM cell itself serves as the selecting element through its phase-change properties, allowing individual addressing without adding extra transistors or diodes that would increase surface area.
Solution Approach 2:
The PCM cell performs multiple functions: it serves as both the memory element for data storage and the selecting device for addressing. By utilizing the phase-change material's ability to switch between high and low resistance states, the same component enables both data storage and selective access, reducing overall device complexity and area.
2Ease of operation
If a selecting device is added to each PCM device, then individual access is enabled, but the array density and scalability to 3D are limited
Solution Approach 1:
The patent transitions from a two-dimensional array with separate selecting devices to a three-dimensional cross-point architecture where PCM cells are positioned at intersections of word and bit lines. This dimensional change allows for higher array density and better scalability by utilizing vertical stacking and multi-layer structures without requiring additional selecting devices at each intersection.
Solution Approach 2:
The patent segments the array into multiple layers with shared word and bit lines, allowing individual PCM cells to be addressed through the intersection of specific word and bit lines in different layers. This segmentation enables high-density 3D arrays while maintaining individual cell accessibility through the cross-point addressing scheme.
3Ease of operation
If PCM cells are arranged in a two-dimensional array with selecting devices, then addressing is possible, but the wiring overhead and device complexity increase
Solution Approach 1:
The patent combines the PCM cell and heater into a single integrated structure at each cross-point intersection, eliminating the need for separate selecting devices. This merging reduces device complexity by removing redundant components and simplifying the wiring architecture while maintaining full addressing capability through the phase-change material's resistance switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for individual access to PCM cells while minimizing substrate area and wiring overhead, enabling scalable and dense three-dimensional PCM arrays with reduced complexity in wiring and transistor usage, thus overcoming the limitations of two-dimensional arrays.
Implementation Method 1
The selecting device can be a MESFET or other field effect transistor with the gate electrode serving as the third electrical connector
Implementation Method 2
PCM functions based upon switching a memory cell, typically based on chalcogenides such as Ge2Sb2Te5, between two stable states, a crystalline state and an amorphous state, by heating the memory cell. To heat the memory cell, an electrical current flows through the PCM cell.
Implementation Method 3
PCM functions based upon switching a memory cell, typically based on chalcogenides such as Ge2Sb2Te5, between two stable states, a crystalline state and an amorphous state
Data Source
AI summary
The present invention generally relates to three-dimensional arrangement of memory cells and methods of addressing those cells. The memory cells can be arranged in a 3D orientation such that macro cells that are in the middle of the 3D arrangement can be addressed without the need for overhead wiring or by utilizing a minimal amount of overhead wiring. An individual macro cell within a memory cell can be addressed by applying three separate currents to the macro cell. A first current is applied to the memory cell directly. A second current is applied to the source electrode of the MESFET, and a third current is applied to the gate electrode of the MESFET to permit the current to travel through the channel of the MESFET to the drain electrode which is coupled to the memory element.