3D Memory Charge-Trap Stack Using Mixed Oxide Dielectrics
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Solution Overview
Problem
Current three-dimensional memory devices face limitations in charge trapping characteristics due to the lack of dielectric materials with a conduction band minimum similar to silicon nitride, which hinders the improvement of charge storage elements in memory devices.
Innovation Solution
A mixed metal oxide material with a conduction band minimum similar to silicon nitride and a higher dielectric constant is formed by intermixing dielectric oxide materials of different elements, such as Al, Si, or transition metal elements, to enhance charge trapping characteristics in memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric materials are used in memory devices, then the device structure is simple and easy to manufacture, but the charge trapping characteristics are insufficient due to lack of materials with conduction band minimum similar to silicon nitride
Solution Approach 1:
The patent employs composite dielectric materials consisting of multiple oxide layers (e.g., silicon oxide, aluminum oxide, titanium oxide) stacked in specific configurations. These composite structures enable achievement of conduction band minimum similar to silicon nitride while maintaining manufacturability through established semiconductor fabrication processes. The composite approach allows optimization of charge trapping characteristics without requiring entirely new material systems.
Solution Approach 2:
The patent modifies dielectric material parameters including composition ratios, layer thicknesses, and stacking sequences to achieve desired conduction band alignment. By adjusting the proportions of different oxide materials and their physical dimensions, the patent optimizes charge trapping characteristics while working within existing manufacturing capabilities and material science principles.
2Reliability
If mixed metal oxide materials are formed by intermixing dielectric oxide materials of different elements, then charge trapping characteristics are enhanced, but the manufacturing process becomes more complex
Solution Approach 1:
The patent forms individual dielectric oxide layers with controlled compositions and thicknesses before final intermixing. This preliminary structuring allows precise control over the mixing ratios and spatial distribution of different metal oxides, enabling reproducible charge trapping characteristics. The pre-formed layers serve as building blocks that can be systematically combined using standard deposition and annealing processes.
Solution Approach 2:
The patent replaces mechanical mixing methods with vapor-phase deposition and thermal diffusion processes. By using chemical vapor deposition or atomic layer deposition to form oxide layers, followed by thermal annealing to induce interdiffusion, the patent achieves homogeneous mixing at the atomic level without mechanical intervention. This substitution enables better control over mixing uniformity and interface quality while maintaining compatibility with semiconductor manufacturing.
3Reliability
If a single dielectric oxide material is used, then the manufacturing process is simple, but the dielectric constant is insufficient compared to mixed metal oxide materials
Solution Approach 1:
The patent constructs composite dielectric structures by stacking multiple oxide layers with different dielectric constants. By combining materials such as silicon oxide, aluminum oxide, and titanium oxide in specific ratios and configurations, the patent achieves an effective dielectric constant higher than any single constituent material. This composite approach leverages the advantageous properties of each material while maintaining structural integrity and manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of mixed metal oxide materials with a conduction band offset around 2.4 eV and a dielectric constant greater than silicon nitride improves charge trapping and data retention in three-dimensional memory devices, providing superior charge storage capabilities.
Implementation Method 1
inducing intermixing across the first dielectric oxide material and the outer dielectric oxide material
Data Source
AI summary
A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening fill structure including a vertical semiconductor channel and a memory film. The memory film includes a tunneling dielectric layer in contact with the vertical semiconductor channel, a first vertical stack of first dielectric oxide material portions located at levels of the insulating layers and including a dielectric oxide material of a first element, and a second vertical stack of second dielectric oxide material portions located at levels of the electrically conductive layers and including a mixed dielectric oxide material that is a dielectric oxide material of the first element and a second element.