3D Memory I/O Voltage Training Without Extra ODT Switching
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Solution Overview
Problem
Conventional techniques for initializing 3D NAND flash memory devices face challenges in accurately calibrating circuitry for high-speed communication due to process technology limitations and reliability issues, leading to significant AC timing margin loss and excessive power consumption.
Innovation Solution
A method for input/output voltage training in 3D memory devices involves setting a reference voltage value at an on-die termination enabled status, performing a write training process, determining if further training is needed, and optimizing the reference voltage value based on the results of data read-out operations, without requiring additional on-die termination enable/disable commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional initialization procedures are used for 3D NAND flash memory devices, then the device can be initialized, but significant AC timing margin loss occurs and power consumption is excessive
Solution Approach 1:
The patent dynamically adjusts the reference voltage (Vref) parameter during the initialization process. By changing Vref from a default value to an optimized value based on read-out results, the system achieves better signal integrity and timing margins while reducing power consumption. This parameter optimization directly addresses the contradiction between reliability and energy loss.
2Reliability
If conventional initialization procedures are used for 3D NAND flash memory devices, then the device can be initialized, but AC timing margin loss occurs
Solution Approach 1:
The patent implements a feedback mechanism where the results of data read-out operations are used to determine whether further write training is needed and to optimize the reference voltage value. This closed-loop approach continuously improves signal accuracy and timing margins by adjusting parameters based on actual performance measurements, resolving the contradiction between reliability and measurement precision.
3Measurement precision
If multiple on-die termination enable/disable commands are used for voltage calibration, then calibration accuracy can be improved, but device complexity and operation time increase
Solution Approach 1:
The patent extracts and eliminates the unnecessary on-die termination enable/disable commands from the conventional initialization procedure. By performing voltage calibration directly without these additional commands, the system achieves comparable or better calibration accuracy while significantly reducing device complexity and operation time. This simplification removes redundant steps that did not contribute to calibration accuracy.
4Ease of operation
If reference voltage is not optimized, then initialization is simpler, but data read accuracy decreases and timing margin losses increase
Solution Approach 1:
The patent performs preliminary voltage calibration by setting the reference voltage to a default value before the main initialization process, then optimizes it based on read-out results. This preliminary action ensures that the system starts with a known good state while allowing for subsequent optimization, thus maintaining ease of operation while improving data read accuracy and reducing timing margin losses.
Data Source
AI summary
Methods for input/output voltage training of a three-dimensional (3D) memory device is disclosed. The method can comprise the following operations: (1) setting a reference voltage value at an on-die termination (ODT) enabled status; (2) controlling the 3D memory device to perform a write training process; (3) determining whether a further write training process is needed; (4) in response to determining that the further write training process is needed, repeating operations (1), (2) and (3); and (5) in response to determining that the further write training process is not needed, setting the reference voltage value as an optimized reference voltage value.