3D Memory Contact Pad Extenders for Reliable Source Connections
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Solution Overview
Problem
The integration limits of two-dimensional nonvolatile memory devices have been reached, necessitating the development of three-dimensional structures with improved operational reliability, particularly in the stacking and connection of memory cells and interlayer insulating layers.
Innovation Solution
A semiconductor device design featuring a source layer, source cutting insulating layer, discharge contacts, and contact pads with extenders, along with a method of manufacturing that includes forming recess areas and contact pads to enhance connectivity and reduce overlap in the horizontal direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If contact pads are formed directly over discharge contacts without extenders, then the manufacturing process is simpler, but the horizontal overlap between components increases causing connectivity issues
Solution Approach 1:
The contact pad structure is segmented into two distinct parts: the main contact pad body and the extender portion. This segmentation allows the extender to specifically address the horizontal overlap issue by extending laterally to reduce overlap with discharge contacts, while the main body maintains its primary function of electrical contact. The segmentation enables precise control over horizontal positioning without complicating the overall manufacturing process.
Solution Approach 2:
The extender introduces a horizontal dimension extension to the contact pad structure. By adding this lateral extension, the design addresses the horizontal overlap problem between contact pads and discharge contacts. This dimensional addition allows better spatial arrangement and connectivity control in the horizontal plane without affecting the vertical stacking simplicity.
2Productivity
If memory cells are arranged in a two-dimensional layout, then the device structure is simpler, but the integration density reaches its limit
Solution Approach 1:
The patent transitions from a two-dimensional memory cell arrangement to a three-dimensional stacked structure. Memory cells are vertically stacked above each other, utilizing the vertical dimension to achieve higher integration density. This dimensional transition allows multiple memory cells to occupy the same horizontal footprint, dramatically increasing productivity and integration density while managing structural complexity through systematic stacking.
Solution Approach 2:
The three-dimensional structure implements a nested arrangement where memory cells, interlayer insulating layers, and contact structures are stacked vertically in nested configurations. Each layer is positioned within the vertical space occupied by layers below it, creating a compact three-dimensional integration that maximizes space utilization and integration density without excessive structural complexity.
3Reliability
If discharge contacts extend deeply into the substrate, then the electrical connection is more reliable, but the manufacturing precision required increases
Solution Approach 1:
The extender is formed as part of the contact pad structure before final assembly, establishing a predetermined horizontal position that guides the discharge contact placement. This preliminary positioning action ensures that discharge contacts align correctly with contact pads, reducing the precision requirements for subsequent manufacturing steps while maintaining reliable electrical connections.
Solution Approach 2:
The extender acts as an intermediary structure between the contact pad and the discharge contact. It provides a lateral extension that facilitates easier alignment and connection, mediating the interface between the horizontally positioned contact pad and the vertically extending discharge contact, thereby reducing the precision burden on manufacturing processes.
Data Source
AI summary
Provided herein is a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a source layer spaced apart from a substrate and disposed in a cell area of the substrate, a source cutting insulating layer spaced apart from the substrate and disposed in a contact area of the substrate, a plurality of discharge contacts penetrating the source cutting insulating layer and extending downwards, and a plurality of contact pads penetrating the source cutting insulating layer and contacting an upper portion of each of the plurality of discharge contacts, respectively. Each of the plurality of contact pads may include an extender extending in a horizontal direction.


