3D Nonvolatile Memory Programming via Page Buffer and RAM
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Solution Overview
Problem
Three-dimensional flash memory systems face reliability issues due to the sequential programming of bits, which increases the number of program operations and leads to memory cell fatigue, affecting the integration density and cost-effectiveness.
Innovation Solution
A method for programming three-dimensional nonvolatile memory systems that involves using a page buffer and random access memory to simultaneously program multi-page data, reducing the number of program operations by loading data directly into the page buffer and bypassing the random access memory for certain bits, thereby minimizing program disturbances and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential programming of bits is used in three-dimensional flash memory, then the programming process is simple to implement, but the number of program operations increases leading to memory cell fatigue and reduced reliability
Solution Approach 1:
The patent applies preliminary action by loading multi-page data into the page buffer before programming operations. The controller receives and prepares complete multi-page data sets in advance, storing them in the page buffer of the three-dimensional flash memory device. This allows all bits to be programmed simultaneously in a single operation rather than sequentially, reducing program disturbances and memory cell fatigue while improving reliability without significantly increasing complexity
Solution Approach 2:
The patent uses the page buffer as an intermediary component between the controller and the memory cells. The page buffer temporarily holds multi-page data and enables simultaneous programming of multiple bits to the same memory cell. This intermediary structure facilitates the transition from sequential to simultaneous programming, reducing the number of program operations and minimizing memory cell fatigue while maintaining a manageable system architecture
2Reliability
If multiple program operations are performed to program all bits to the same memory cell, then data can be stored, but program disturbances increase and reliability decreases
Solution Approach 1:
The patent merges multiple programming operations into a single simultaneous programming event. By loading multi-page data containing all bits for a memory cell into the page buffer beforehand, the system can program all bits to the same memory cell in one operation. This consolidation eliminates program disturbances caused by multiple sequential programming events while ensuring reliable data storage, directly addressing the contradiction between reliability and program disturbances
3Quantity of substance
If three-dimensional memory architecture is used, then integration density increases, but reliability must be improved due to increased complexity
Solution Approach 1:
The patent applies preliminary action by preparing and loading complete multi-page data sets into the page buffer before programming. This approach leverages the three-dimensional memory architecture's high integration density while improving reliability by reducing the number of program operations. The controller receives and prepares all necessary data in advance, enabling simultaneous programming that minimizes memory cell fatigue and program disturbances, thus enhancing reliability without sacrificing the integration benefits of three-dimensional architecture
Data Source
AI summary
A program method for a memory system including a three-dimensional nonvolatile memory having multi-level memory cells and a random access memory. The method uses the random access memory to variously store selected bits of multi-bit data during the programming of a row of memory cells in the three-dimensional nonvolatile memory.