3D Memory Passive Device Integration via Stepped Surface

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Solution Overview

Problem

Current semiconductor technologies face challenges in integrating passive devices, such as capacitors and resistors, seamlessly with three-dimensional memory devices, particularly in forming structures that are compatible and efficient within the complex architecture of these devices.

Innovation Solution

The development of a three-dimensional memory device structure that includes a memory device region with non-volatile memory devices, a peripheral device region with active driver circuits, and a stepped surface region containing passive driver circuits, utilizing a stack of alternating electrically insulating and conductive layers over a substrate, with dielectric material and contact via structures to form capacitors and resistors that are integrated within the device architecture.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If passive devices are integrated within the three-dimensional memory device structure, then device compatibility and functionality are improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvedevice compatibilityVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges passive devices (capacitors and resistors) with the three-dimensional memory device structure by forming them within the same alternating stack of conductive and insulating layers. The passive devices share common layers and structures with the memory devices, eliminating the need for separate fabrication processes and reducing overall device complexity despite increased functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The alternating stack structure serves multiple functions simultaneously: it forms both memory devices and passive devices (capacitors and resistors). The same conductive layers serve as electrodes for both memory cells and capacitors, while insulating layers serve as dielectrics for both memory tunnel barriers and capacitor dielectrics, enabling universal use of the base structure for multiple device types.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If passive devices are formed outside the memory device region, then manufacturing process simplicity is maintained, but integration efficiency and device performance are reduced

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidintegration efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent performs preliminary action by forming the alternating stack of conductive and insulating layers that will serve dual purposes for both memory devices and passive devices. This pre-formed structure enables subsequent formation of both device types using the same layer framework, maintaining manufacturing simplicity while improving integration efficiency through unified processing.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If a single conductive layer is formed to serve both passive and memory devices, then manufacturing steps are reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvenumber of deposition stepsVSAvoidlayer alignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by forming the conductive layers with specific local properties that satisfy different device requirements. The same conductive layer material and deposition process are used, but the layers are configured with different geometries, thicknesses, and arrangements in different regions to optimize performance for both memory devices and passive devices, reducing precision requirements while maintaining manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9589981B2Passive devices for integration with three-dimensional memory devices
Publication Date: 2017.03.07 SANDISK TECHNOLOGIES LLC
  • US9589981B2 patent drawing
  • US9589981B2 patent drawing
  • US9589981B2 patent drawing

AI summary

A three dimensional memory device includes a memory device region containing a plurality of non-volatile memory devices, a peripheral device region containing active driver circuit devices, and a stepped surface region between the peripheral device region and the memory device region containing a plurality of passive driver circuit devices.