3D Memory Channel Plug Formation Without SONO Punch Damage
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Solution Overview
Problem
The existing 3D memory device fabrication processes, particularly the SONO punch process, face challenges such as narrow process margins, increased complexity, and reduced yield due to the use of a channel sacrificial layer, which can cause sidewall damages and void formation, leading to cell malfunction and cost issues.
Innovation Solution
A backside substrate thinning process is introduced to replace the conventional SONO punch process, eliminating the need for a channel sacrificial layer and reducing the risk of sidewall and semiconductor plug damages, while an etch stop layer is formed between dielectric decks to protect the lower deck from upper channel hole overlay shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the SONO punch process with channel sacrificial layer is used, then the semiconductor plug can be formed, but sidewall damages and void formation occur leading to cell malfunction
Solution Approach 1:
The patent removes the channel sacrificial layer from the fabrication process entirely, replacing it with a direct etch-stop approach. This extraction of the problematic sacrificial layer eliminates the source of sidewall damages and void formation while maintaining the necessary plug formation functionality through modified etching and deposition sequences.
Solution Approach 2:
The patent introduces an etch stop layer as an intermediary element between the channel structure and the semiconductor plug formation process. This etch stop layer serves as a protective mediator that prevents direct damage to the channel sidewalls during etching operations, thereby eliminating void formation and sidewall damages without requiring a sacrificial layer.
2Ease of manufacture
If the channel sacrificial layer is used in the SONO punch process, then the semiconductor plug can be formed, but the process complexity and fabrication difficulty increase
Solution Approach 1:
The patent extracts and removes the channel sacrificial layer from the fabrication sequence, thereby reducing the total number of process steps. This elimination simplifies the manufacturing process by removing deposition, patterning, and removal steps associated with the sacrificial layer, while maintaining plug formation capability through alternative etch-stop and direct deposition methods.
Solution Approach 2:
Instead of using a sacrificial layer that is deposited and then removed, the patent inverts the approach by using an etch stop layer that remains in place and serves its function permanently. This inversion eliminates the need for subsequent removal steps and simplifies the overall process flow by making the stop layer a permanent structural element rather than a temporary fabrication aid.
3Manufacturing precision
If photolithograph alignment is performed without etch stop layer, then the alignment precision is difficult to achieve, but adding etch stop layer protects lower deck from upper channel hole overlay shifts
Solution Approach 1:
The patent introduces an etch stop layer as an intermediary reference plane between the lower and upper dielectric decks. This intermediary layer provides a stable, visible target for photolithograph alignment, enabling precise overlay of channel holes across multiple decks. The etch stop layer acts as a mediator that facilitates accurate alignment without requiring complex alignment systems or procedures.
Data Source
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AI summary
A three-dimensional memory device (200, 201), comprising: a memory stack (204) comprising interleaved conductive layers (203) and dielectric layers (205); a channel structure (216) extending vertically through the memory stack (204) and comprising: a channel plug (218) in a lower portion of the channel structure (216); a memory film (220) along a sidewall of the channel structure (216); and a semiconductor channel (222) over the memory film (220) and in contact with the channel plug (218); and a semiconductor layer above the memory stack (204) and comprising a semiconductor plug (232) above and in contact with the semiconductor channel (222). A method for forming the three-dimensional memory device (200, 201) is also provided.