3D Nonvolatile Memory Read Operation Voltage Control
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Solution Overview
Problem
Three-dimensional (3D) semiconductor memory devices face challenges in reducing read disturbances due to their unique electrical parasitics, which require different driving methods compared to two-dimensional (2D) devices, leading to inefficiencies in data retention and operation.
Innovation Solution
The method involves applying specific turn-on and turn-off voltages to string and ground selection transistors in a predetermined order and with predetermined levels to ensure uniform potential distribution across cell strings, thereby reducing read disturbances during operations in nonvolatile memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional driving methods for 2D semiconductor memory devices are applied to 3D semiconductor memory devices, then the structural characteristics of 3D devices can be utilized, but read disturbances increase due to different electrical parasitics
Solution Approach 1:
The patent applies different voltage levels and timing parameters for string selection lines and ground selection lines during read operations. Specifically, a first voltage level is applied to the string selection line while a second, different voltage level is applied to the ground selection line, and these voltages are applied at different times to compensate for electrical parasitics in 3D memory structures.
2Reliability
If different driving voltages and timing are applied to string selection lines and ground selection lines, then read disturbances are reduced, but device complexity increases
Solution Approach 1:
The patent divides the control of selection transistors into separate string selection lines and ground selection lines, each with independent voltage and timing control. This segmentation allows for optimized driving conditions for each line type, reducing read disturbances while maintaining manageable device complexity through systematic control.
Data Source
AI summary
A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation.