3D Memory Device Sacrificial Layer Removal
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Solution Overview
Problem
Conventional methods for manufacturing three-dimensional (3D) memory devices face reliability issues due to process defects caused by replacing sacrificial insulating layers with gate material layers, leading to degradation of the device's performance.
Innovation Solution
The solution involves alternately stacking interlayer insulating and sacrificial layers, forming string pillars and dummy holes with specific depths and widths, and using these structures to facilitate the removal of sacrificial layers and the formation of conductive line patterns, thereby improving the integration and reliability of the 3D memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sacrificial insulating layers are replaced with gate material layers in conventional 3D memory device manufacturing, then the device structure is formed, but process defects occur and reliability degrades
Solution Approach 1:
The patent extracts and removes the problematic sacrificial insulating layers completely, replacing them with a different structural approach where gate material layers are deposited without requiring sacrificial layer removal, thereby eliminating the source of process defects
Solution Approach 2:
Instead of the conventional approach of depositing gate material to replace sacrificial layers, the patent inverts the sequence by first forming the memory hole structure and then selectively depositing gate material only in required areas, avoiding the need for sacrificial layer replacement entirely
2Stability of the object's composition
If interlayer insulating layers and sacrificial layers are alternately stacked, then layer separation is prevented, but additional structural complexity is introduced
Solution Approach 1:
The patent merges the interlayer insulating function and sacrificial layer function into a single integrated structure, where the same layer serves both purposes, thereby preventing layer separation without adding structural complexity
Solution Approach 2:
The patent creates multi-functional layers that simultaneously provide electrical insulation and structural support, eliminating the need for separate sacrificial layers and reducing overall device complexity while maintaining layer stability
Data Source
AI summary
Disclosed is a semiconductor device, including: stack structures including interlayer insulating patterns and conductive line patterns, which are alternately stacked, and separated by a first slit; string pillars passing through the stack structures; and dummy holes passing through top portions of the stack structures to be spaced apart from bottom surface of the stack structures and disposed between the string pillars.