3D Memory Select Line Segmentation to Reduce Cell Interference

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Solution Overview

Problem

Three-dimensional memory devices face challenges in increasing integration density while minimizing interference between memory cells.

Innovation Solution

A memory device design featuring first and second memory blocks with common source select lines, a connection region, and specific source select line configurations to reduce interference and enhance integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of memory cells stacked on top of each other is increased to improve integration density, then the integration density is improved, but interference between memory cells is increased

Engineering Contradiction:
Improveintegration densityVSAvoidinterference between memory cells
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The memory block is divided into two groups of cell plugs (first group and second group) with different source select line configurations. The first group uses a first source select line extending to the connection region, while the second group uses a second source select line not extending to the connection region. This segmentation allows different interference management strategies for different groups, reducing overall interference while maintaining high integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different source select line configurations are applied to different groups of cell plugs within the same memory block. The first group has source select lines extending to the connection region for better signal integrity, while the second group has source select lines that do not extend, reducing interference. This local differentiation optimizes performance for each group's specific position and function.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the distance between memory cells is reduced to improve integration density, then the integration density is improved, but interference between memory cells is increased

Engineering Contradiction:
Improveintegration densityVSAvoidinterference between memory cells
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

By segmenting the memory block into two groups with different source select line configurations, the patent creates spatial separation in electrical characteristics even when physical distances are reduced. This allows tighter packing of memory cells while managing interference through electrical segmentation rather than just physical spacing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The source select lines act as intermediaries that mediate between the memory cells and the connection region. By controlling which source select lines extend to the connection region, the patent manages signal transmission and interference without requiring increased physical spacing between cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If common source select lines are used to couple multiple memory blocks, then device complexity is reduced, but interference between memory cells is increased

Engineering Contradiction:
Improveselect line configurationVSAvoidinterference between memory cells
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the source select line configuration into two types (first and second source select lines) within the same memory block. This segmentation allows the system to balance between using common source select lines for complexity reduction and using differentiated configurations for interference management.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different source select line configurations are applied locally to different groups of cell plugs based on their specific requirements. This local quality approach allows common source select lines to be used where appropriate for complexity reduction while differentiated lines are used where needed for interference management.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12394484B2Memory device including select lines
Publication Date: 2025.08.19 SK HYNIX INC
  • US12394484B2 patent drawing
  • US12394484B2 patent drawing
  • US12394484B2 patent drawing

AI summary

The present disclosure relates to a memory device including a first memory block including a first group of cell plugs and a second group of cell plugs, a second memory block including a third group of cell plugs and a fourth group of cell plugs, a connection region located between the first and second memory blocks, a first source select line commonly coupled to the first group of cell plugs and third group of cell plugs, a second source select line coupled to the second group of cell plugs, and a third source select line coupled to the fourth group of cell plugs.