3D Semiconductor Memory Separation Structure for Dense Stacked Arrays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of two-dimensional semiconductor memory devices is limited by the high cost of advanced pattern fineness technologies, necessitating the development of three-dimensional semiconductor memory devices with increased capacity without the expense of expensive equipment.
Innovation Solution
A three-dimensional semiconductor memory device is designed with stacked blocks and separation structures on a substrate, featuring bit lines and contact structures to enhance integration density while maintaining cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional semiconductor memory devices use advanced pattern fineness technologies to increase integration, then integration density is improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically stacked memory structures. Multiple memory cell layers are stacked in the vertical direction, allowing integration density to increase without requiring finer lateral patterning. This dimensional change enables higher capacity while avoiding the need for expensive advanced lithography equipment.
Solution Approach 2:
The memory device is divided into multiple discrete stack blocks, each containing vertically stacked memory cell layers. These stack blocks are separated by separation structures that include mold layers and spacers. The segmentation into modular stack blocks simplifies manufacturing and allows for scalable integration without requiring monolithic fine-patterning across the entire chip.
2Quantity of substance
If three-dimensional stacked structures are implemented to increase integration, then capacity increases, but chip size may increase
Solution Approach 1:
Multiple memory cell layers are nested vertically within each stack block, with each layer containing memory cells arranged in the lateral direction. The separation structures with mold layers and spacers are nested between stack blocks. This nested arrangement maximizes the use of vertical space, allowing high capacity in a compact footprint by utilizing the third dimension rather than expanding laterally.
Data Source
AI summary
A three-dimensional semiconductor memory device may include a first stack block including first stacks arranged in a first direction on a substrate, a second stack block including second stacks arranged in the first direction on the substrate, and a separation structure provided on the substrate between the first stack block and the second stack block. The separation structure may include first mold layers and second mold layers, which are stacked in a vertical direction perpendicular to a top surface of the substrate.