3D Memory Shared Select Gate Connections
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Solution Overview
Problem
Conventional memory devices face area limitations due to the large space occupied by circuitry, particularly in structures with separate drain select lines for each sub-block and block, which increases with higher memory density.
Innovation Solution
The memory device employs a design where select lines, such as drain select lines, within the same block or between different blocks can be electrically connected, allowing for shared select line signals, thereby reducing the number of drivers and occupying less area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate drain select lines are provided for each sub-block and block, then memory cells can be selectively accessed in each block, but the circuitry occupies a relatively large area in the memory device
Solution Approach 1:
The patent merges separate drain select lines from multiple blocks into a shared common drain select line. Specifically, drain select lines from first and second blocks are connected to form a common drain select line that serves both blocks, thereby reducing the total number of select lines and the area occupied by associated circuitry while maintaining the ability to selectively access memory cells in each block
Solution Approach 2:
The common drain select line serves multiple functions by being shared across multiple blocks. A single select line performs the selection function for memory cells in both the first and second blocks, making the circuitry universal and reducing redundancy in the memory device structure
2Quantity of substance
If the number of memory blocks is increased to provide higher memory density, then storage capacity is improved, but the area occupied by drivers increases
Solution Approach 1:
The patent combines the driver requirements for multiple blocks into a single shared driver. By connecting drain select lines from multiple blocks to a common line, the system reduces the number of drivers needed from multiple separate drivers to a single shared driver, thereby enabling higher memory density without proportionally increasing driver area
Data Source
AI summary
Some embodiments include apparatuses, and methods of operating the apparatuses. Some of the apparatuses include a data line, a first memory cell string including first memory cells located in different levels of the apparatus, first access lines to access the first memory cells, a first select gate coupled between the data line and the first memory cell string, a first select line to control the first select gate, a second memory cell string including second memory cells located in different levels of the apparatus, second access lines to access the second memory cells, the second access lines being electrically separated from the first access lines, a second select gate coupled between the data line and the second memory cell string, a second select line to control the second select gate, and the first select line being in electrical contact with the second select line.