3D Memory Cell Array Simultaneous Read Method
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Solution Overview
Problem
Conventional nonvolatile memory devices face inefficiencies in reading memory device information due to the need for multiple read operations, which prolongs the information read time and can result in abnormal read operations if cell strings are not properly formed, leading to not-open cell strings that cause read errors.
Innovation Solution
A method and system for reading memory device information from a three-dimensional (3D) memory cell array that simultaneously reads data from both an original plane and a replica plane, using selection and non-selection read voltages to ensure accurate data retrieval even if not-open cell strings are present, thereby reducing the number of read operations and improving operating speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple read operations are performed to ensure accurate data retrieval, then reliability of data reading is improved, but information read time increases
Solution Approach 1:
The patent merges the reading operations of the original plane and replica plane into a single simultaneous read operation. By applying a read voltage to both planes at the same time and processing their results together, the system achieves reliable data retrieval in one operation rather than requiring separate read operations for each plane, thus reducing total read time while maintaining reliability.
Solution Approach 2:
The patent performs preliminary verification by reading both the original plane and its replica simultaneously before final data validation. This allows the system to detect and handle not-open cell strings in advance, ensuring data accuracy is confirmed before completing the read operation, thereby maintaining high reliability without requiring multiple sequential reads.
2Reliability
If cell strings are strictly validated before reading, then read error rate is reduced, but operating speed decreases due to additional validation steps
Solution Approach 1:
The patent combines cell string validation with the main read operation by simultaneously reading both original and replica planes. The validation of cell string openness is performed as part of the same voltage application and data retrieval process, eliminating separate validation steps and maintaining high operating speed while ensuring read accuracy through comparative verification.
Solution Approach 2:
The patent uses a replica plane as a copy of the original plane to validate read operations. By having an identical copy stored separately, the system can quickly verify data integrity through comparison without requiring complex validation procedures, thus maintaining fast operating speed while reducing read error rates.
3Measurement precision
If sequential reading of original and replica planes is performed, then data accuracy is verified, but read time is prolonged
Solution Approach 1:
The patent merges the reading operations of the original plane and replica plane into a single simultaneous operation. Both planes are read at the same time using coordinated voltage applications, and their results are processed together to verify data accuracy. This eliminates the time penalty of sequential reading while maintaining the accuracy benefits of comparative verification.
Solution Approach 2:
The patent maintains continuous useful action by performing both original and replica plane reads simultaneously without interruption. The read voltages are applied continuously to both planes at the same time, and data retrieval proceeds without the pauses and transitions inherent in sequential operations, thus reducing total read time while preserving data accuracy verification.
Data Source
AI summary
Disclosed is a method reading memory device information from a nonvolatile memory device having a three-dimensional (3D) memory cell array including an original plane storing data associated with the information in a first group of memory cells and a replica plane storing the data in replica in a second group of memory cells. The method applies a selection read voltage to a selected word line connected to first and second groups of memory cells while applying a non-selection read voltage to other word lines, and simultaneously reading first data from the first group of memory cells and second data from the second group of memory cells.