3D Memory Staircase Layout With Slanted Steps for Layer Contact

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Solution Overview

Problem

Existing three-dimensional memory devices face challenges in efficiently forming vertical NAND strings with slanted steps in the staircase region, which affects the integration and performance of memory elements.

Innovation Solution

A method involving the formation of an alternating stack of insulating and conductive layers with slanted sidewalls, where memory openings are created and filled with vertical stacks of memory elements and semiconductor channels, allowing for the formation of slanted steps in the staircase region to facilitate multi-lane layer contact via structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If vertical NAND strings are formed with conventional straight steps in the staircase region, then the formation process is simpler, but contact efficiency and device performance are reduced

Engineering Contradiction:
Improvecontact efficiencyVSAvoidstaircase region structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces slanted steps in the staircase region instead of conventional straight vertical steps. The slanted steps have a specific angle (e.g., 45 degrees) relative to the vertical direction, creating an asymmetric structure that improves contact efficiency between memory elements and conductive layers while maintaining manufacturability through controlled etching processes.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The invention transitions from a two-dimensional vertical step structure to a three-dimensional slanted step structure by introducing a lateral component to the step geometry. This dimensional change allows better spatial arrangement of memory openings and improved contact pathways through the alternating stack, enhancing overall device performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If memory openings are formed through the alternating stack, then vertical NAND strings can be created, but the precision of forming slanted steps at acute angles is challenging

Engineering Contradiction:
Improveslanted step angleVSAvoidpatterning process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent employs preliminary patterning actions by forming mandrel structures and using spacer materials before creating the final memory openings. The slanted steps are formed through a sequence of deposition and etching operations where spacer layers are deposited conformally and then anisotropically etched to create the desired slanted geometry, ensuring precise angle control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention uses intermediary spacer materials and mandrel structures as mediators to achieve the slanted step geometry. These intermediary elements are deposited and patterned first, then used as templates to guide the formation of the final slanted steps, making the complex angular patterning more manufacturable through standard semiconductor processing techniques.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260033320A1Three-dimensional memory device with slanted steps in a staircase region and method of forming the same
Publication Date: 2026.01.29 SANDISK TECHNOLOGIES LLC
  • US20260033320A1 patent drawing
  • US20260033320A1 patent drawing
  • US20260033320A1 patent drawing

AI summary

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, the alternating stack having a pair of lengthwise sidewalls that laterally extend along a first horizontal direction and having stepped surfaces in a staircase region, memory openings vertically extending through a memory array region of the alternating stack in which each layer within the alternating stack is present, and memory opening fill structures in the memory openings. Each of the memory opening fill structures includes a vertical stack of memory elements and a vertical semiconductor channel. The stepped surfaces in the staircase region include first vertical steps laterally extending along a first lateral direction which is at an acute angle relative to the first horizontal direction in a plan view along a vertical direction.