3D Memory Gate Line Slit Reinforcement Against Word Line Collapse
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As 3D NAND memory devices scale with increasing oxide/nitride layers, the etch depth of gate line slits increases, leading to a risk of word line structure collapse due to stress, which affects subsequent fabrication processes like lithographic alignment, and existing solutions either increase manufacturing costs or fail to adequately address the structural integrity.
Innovation Solution
A method for forming a three-dimensional memory device with a vertically fixed Gate Line Slit (GLS) structure, incorporating structure strengthen plugs with a narrow support body and enlarged connecting portions, which reduces the risk of word line collapse by increasing the thickness of the silicon oxide layer between the conductive wall and the word line while minimizing the area of the structure strengthen plug, thus reducing the amount of silicon oxide needed and associated costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of oxide/nitride layers is increased to improve area utilization, then the memory density is improved, but the etch depth of gate line slit increases and the risk of word line structure collapse increases
Solution Approach 1:
The gate line slit is divided into multiple sections by forming structure strengthen plugs at different depths within the alternating dielectric stack. These plugs segment the continuous gate line slit into discrete sections, preventing stress propagation and reducing the risk of word line structure collapse while maintaining the ability to access deep layers for high density.
Solution Approach 2:
Structure strengthen plugs are formed in advance within the alternating dielectric stack before the gate line slit etching process. This preliminary placement of support structures ensures that when the gate line slit is later etched to greater depths, the word line structure already has embedded reinforcement points to prevent collapse.
2Reliability
If the thickness of silicon oxide layer between conductive wall and word line is increased to reduce electrical leakage, then the reliability is improved, but the area of structure strengthen plug increases and manufacturing cost increases
Solution Approach 1:
The structure strengthen plugs are designed with non-uniform cross-sectional areas along their length, with enlarged connecting portions at specific locations where they interface with gate line slits. This local enlargement provides the necessary mechanical support and electrical isolation only where needed, rather than uniformly increasing the plug area throughout, thus preventing electrical leakage without proportionally increasing overall material usage and cost.
Data Source
AI summary
Embodiments of three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a structure strengthen plug in an upper portion of the alternating dielectric stack, wherein the structure strengthen plug has a narrow support body and two enlarged connecting portions; forming a gate line silt in the alternating dielectric stack to expose a sidewall of one enlarged connecting portion of the structure strengthen plug; and forming a gate line slit structure in the gate line slit including an enlarged end portion connected to the one enlarged connecting portion of the structure strengthen plug.