3D Semiconductor Memory Slit Structure Shape Control
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Solution Overview
Problem
Three-dimensional semiconductor memory devices face challenges in maintaining the shape of memory blocks due to high aspect ratios, which affects integration density and electrical characteristics, leading to potential bending and non-uniformity of slit structures.
Innovation Solution
A semiconductor memory device with a stack structure and slit structure that includes insulation and conductive layers, where the slit structure divides memory blocks into line structures with bridge regions, maintaining the shape of memory blocks and improving aspect ratios by alternating slit portions and bridge regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the stack structure is divided into memory blocks using a slit structure, then integration density is improved, but the shape of memory blocks becomes distorted due to high aspect ratio
Solution Approach 1:
The slit structure is divided into multiple slit portions (first, second, third, fourth slit portions) that are alternately arranged and extend in different directions. This segmentation allows the slit to divide the stack structure into memory blocks while maintaining structural integrity and preventing shape distortion through the distributed arrangement of slit segments.
Solution Approach 2:
Different regions of the memory block are given different properties through the alternating slit portions and bridge regions. The bridge regions provide structural support and electrical connection in areas where slits would otherwise create discontinuities, while the slit portions provide isolation in other areas. This local differentiation maintains overall block shape while enabling functional division.
2Quantity of substance
If the slit structure is formed to divide blocks, then integration density is improved, but bending and non-uniformity occur in the slit structure
Solution Approach 1:
The slit structure employs an asymmetric arrangement where slit portions and bridge regions are alternately positioned at different locations within the memory block. The first and second slit portions extend in a first direction while third and fourth slit portions extend in a second direction perpendicular to the first. This asymmetric, alternating pattern distributes stress and prevents uniform bending while maintaining integration density.
Solution Approach 2:
The bridge regions are pre-positioned between adjacent memory blocks to provide structural support and prevent bending before the memory blocks are fully formed and stacked. This preliminary structural reinforcement ensures that the high aspect ratio stack structure maintains its shape and that the slit structure remains uniform throughout the stacking process.
3Productivity
If stacked numbers of three-dimensional semiconductor memory devices are increased to increase integration density, then productivity is improved, but shape distortion and structural instability increase
Solution Approach 1:
Multiple memory blocks with slit structures are stacked vertically to form a three-dimensional integrated structure. The alternating slit portions and bridge regions in each stacked layer work together to maintain the shape of individual blocks while contributing to the overall structural stability of the stacked assembly. This nested arrangement allows increased integration density without proportional increase in shape distortion.
Solution Approach 2:
The alternating slit and bridge region pattern is established in each layer before stacking, providing pre-formed structural support that prevents bending and shape distortion as the number of stacked layers increases. This preliminary structural design ensures that each additional stacked layer maintains the required shape integrity.
Data Source
AI summary
A semiconductor memory device includes a stack structure and a slit structure. The stack structure includes insulation layers and conductive layers alternately stacked with the insulation layers. The slit structure is configured to divide the stack structure into memory blocks. A part of the slit structure configured to define one memory block has a dashed shape including a slit region and a bridge region.