3D Memory Source Contact Layout for Reliable Channel Connection
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Solution Overview
Problem
The reliability of three-dimensional memory cells is compromised due to deterioration and challenges in contact formation with the channel, particularly in forming memory holes through stacked electrode layers and insulating layers.
Innovation Solution
A semiconductor memory device design featuring a columnar section with a channel body and charge storage film, where the channel body is electrically connected to a conductive layer with a large contact area, and an air gap covered by a conductive film, along with a sacrificial layer replacement process to form conductive layers and source layers, enhancing contact resistance and memory cell reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If memory holes are formed in stacked electrode layers and insulating layers, then three-dimensional memory structure is achieved, but contact formation becomes difficult and reliability deteriorates
Solution Approach 1:
The conductive layer is segmented into multiple regions including a first region with larger thickness and a second region with smaller thickness. This segmentation allows different portions of the channel body to have optimized contact areas, improving both contact formation and reliability while maintaining the three-dimensional stacked structure
Solution Approach 2:
Different regions of the conductive layer are given different local qualities (thicknesses) to optimize specific functions. The first region has larger thickness for better contact, while the second region has smaller thickness for other performance requirements, resolving the contradiction between contact formation and overall device performance
2Reliability
If channel body contact area is increased, then reliability improves, but device area increases
Solution Approach 1:
Instead of increasing contact area in the planar dimension, the invention increases the thickness (vertical dimension) of the conductive layer in the first region. This dimensional transition allows achieving better contact reliability without expanding the device footprint, effectively resolving the area-reliability trade-off
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a substrate; an insulating layer provided on the substrate; a conductive layer provided on the insulating layer; a stacked body provided on the conductive layer and including a plurality of electrode layers and a plurality of insulating layers respectively provided among the plurality of electrode layers; a columnar section piercing through the stacked body to reach the conductive layer and extending in a first direction in which the stacked body is stacked; and a source layer. The columnar section includes a channel body and a charge storage film provided between the channel body and the respective electrode layers. The conductive layer includes a first film having electric conductivity and in contact with the lower end portion of the channel body; and an air gap provided to be covered by the first film.