3D Memory Source Structure With Discontinuous Interface
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Solution Overview
Problem
Two-dimensional semiconductor devices face limitations in integration density due to the high cost of forming fine patterns, which restricts their performance and cost-effectiveness, prompting the need for three-dimensional semiconductor memory devices with improved reliability and integration density.
Innovation Solution
A 3D semiconductor memory device design featuring a source structure with sequentially stacked source conductive patterns, vertically stacked electrodes, and penetrating vertical semiconductor patterns, where the first source conductive pattern has a discontinuous interface between its top and bottom surfaces, enhancing integration density and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional semiconductor devices use fine pattern formation techniques to increase integration density, then integration density is improved, but manufacturing cost increases due to high-priced apparatuses
Solution Approach 1:
The patent transitions from two-dimensional planar semiconductor devices to three-dimensional vertical structures. Memory cells are arranged in multiple layers with vertical channel structures extending through stacked source and drain regions, enabling higher integration density without requiring finer lateral patterning. This dimensional transition allows achieving high density using more cost-effective manufacturing processes.
2Quantity of substance
If three-dimensional semiconductor memory devices are designed with vertically stacked structures, then integration density is improved, but device complexity increases
Solution Approach 1:
The three-dimensional memory device is divided into multiple discrete layers including alternating source and drain regions, with vertical channel structures segmented into distinct functional zones. This segmentation allows each layer to be formed using separate processing steps, simplifying the overall manufacturing approach despite the vertical complexity. The modular layered structure makes the complex 3D architecture more manageable and manufacturable.
Data Source
AI summary
A three-dimensional (3D) semiconductor memory device includes a source structure disposed on a horizontal semiconductor layer and including a first source conductive pattern and a second source conductive pattern which are sequentially stacked on the horizontal semiconductor layer, an electrode structure including a plurality of electrodes vertically stacked on the source structure, and a vertical semiconductor pattern penetrating the electrode structure and the source structure, wherein a portion of a sidewall of the vertical semiconductor pattern is in contact with the source structure. The first source conductive pattern includes a discontinuous interface at a level between a top surface of the horizontal semiconductor layer and a bottom surface of the second source conductive pattern.