3D Memory Stack With Split Storage Layers for Low-Voltage Multibit Operation
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Solution Overview
Problem
Current semiconductor devices face limitations in increasing data storage capacity and efficiency, particularly in achieving high memory windows, endurance, and retention characteristics while maintaining low operating voltages.
Innovation Solution
The semiconductor device incorporates a stack structure with interlayer insulating layers and gate electrodes alternately stacked, featuring a data storage layer and data storage patterns made of different materials, along with a channel layer and dielectric layers, enabling efficient write and erase operations through controlled voltage applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single data storage layer is used, then the device structure is simple, but the memory window and storage capacity are limited
Solution Approach 1:
The data storage function is segmented into two distinct components: a data storage layer and data storage patterns. This segmentation allows each component to contribute differently to the overall memory window, with the data storage layer providing baseline storage and the patterns providing additional capacitive enhancement, thereby resolving the contradiction between structural simplicity and memory window performance.
Solution Approach 2:
The patent employs composite material structures where the data storage layer and data storage patterns are made of different materials with complementary properties. The data storage layer uses materials optimized for charge retention, while the data storage patterns use materials with high dielectric constants to enhance capacitance, achieving improved memory window without excessive structural complexity.
2Quantity of substance
If data storage capacity is increased, then more data can be stored, but operating voltage increases
Solution Approach 1:
The patent replaces traditional voltage-scaling approaches with a capacitive enhancement mechanism. Instead of increasing voltage to achieve higher storage capacity, the data storage patterns provide additional capacitance that amplifies the charge storage effect at lower voltages, effectively substituting a voltage-based system with a capacitance-based system.
Solution Approach 2:
The invention changes the key parameter from voltage to capacitance for achieving higher storage capacity. By introducing data storage patterns with high dielectric constants, the system achieves increased effective capacitance that allows more data to be stored at reduced operating voltages, fundamentally changing the operational parameters of the memory device.
3Ease of manufacture
If traditional data storage structures are used, then manufacturing is simple, but endurance and retention characteristics are insufficient
Solution Approach 1:
The data storage patterns are formed preliminarily before final device operation, integrated into the manufacturing flow at an early stage. This preliminary formation allows the patterns to be established as part of the base structure, providing enhanced endurance and retention characteristics from the outset without requiring complex post-processing steps.
Solution Approach 2:
The patent merges the data storage patterns with the existing data storage layer in a unified structure. Both components work together synergistically, where the patterns provide capacitive enhancement and the layer provides charge retention, achieving improved endurance and retention while maintaining manufacturing simplicity through integrated formation processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances memory window capacity, improves endurance and retention, and reduces operating voltage, enabling secure multibit operations compared to previous semiconductor devices.
Implementation Method 1
A first material of the data storage layer is different from a second material of the data storage patterns... enables secure multibit operations... ferroelectric layer to transition into a first polarization state... transition into a second polarization state
Data Source
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AI summary
The present disclosure provides methods, apparatuses, and systems for operating and manufacturing a semiconductor device. In some embodiments, a semiconductor device (1) includes a stack structure (ST) including interlayer insulating layers (33) and gate electrodes (75), a channel layer (52) disposed inside a hole (39) penetrating through the stack structure, a data storage layer (48) disposed between the stack structure and the channel layer, data storage patterns (45) disposed between the data storage layer and the gate electrodes, and dielectric layers (42) disposed between the data storage patterns and the gate electrodes. The interlayer insulating layers and the gate electrodes are alternately and repeatedly stacked in a first direction. A first material of the data storage layer is different from a second material of the data storage patterns.