3D Memory Stack Hole Uniformity via Bidirectional Etching
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, the dry etch process can lead to differences in the width of holes or trenches along their height, causing variations in electrical characteristics and reliability issues due to over-etching from top to bottom.
Innovation Solution
A method involving forming a stack layer over a substrate, detaching and reversing it, and performing two etch processes to ensure uniform width of vertical holes, with the first etch process creating the holes in one direction and the second process refining them for uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single dry etch process is performed from top to bottom to form vertical holes in the stacked structure, then the holes can be formed efficiently, but the width of holes in the upper part becomes larger than that in the lower part due to over-etching
Solution Approach 1:
The patent divides the hole formation process into two separate etch steps: a first etch process that forms holes from the upper surface, and a second etch process that forms holes from the lower surface. This segmentation allows each etch process to work on a shorter etching distance, preventing over-etching and ensuring uniform hole width throughout the stacked structure.
Solution Approach 2:
The patent performs the second etch process from the lower surface of the stacked structure in the opposite direction of the first etch process. By etching from both directions, the process compensates for the over-etching that would occur in a single-direction etch, achieving uniform hole width by meeting in the middle.
2Quantity of substance
If the height of the stacked structure is increased to achieve higher integration, then more memory cells can be stacked, but the difference in hole width between upper and lower parts increases
Solution Approach 1:
By segmenting the etch process into two directional etches, the patent enables formation of uniform holes even in tall stacked structures with many memory cells. Each etch step covers only half the total height, maintaining precision regardless of the total stack height.
Solution Approach 2:
The patent introduces a bidirectional etching approach, adding the dimension of etching directionality. Instead of etching only from top to bottom, the process etches from both top and bottom directions simultaneously, solving the precision problem in the vertical dimension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the width difference of holes or trenches, enhancing the reliability and consistency of semiconductor memory devices by ensuring uniform electrical characteristics across the structure.
Implementation Method 1
performing a first etch process to form a vertical hole in the stack layer in a first direction... and performing a second etch process against the reversed stack layer
Data Source
AI summary
A method of manufacturing a semiconductor memory device includes forming a first attached layer on a substrate, forming a stack layer on the first attached layer, separating the stack layer and the first attached layer from each other, forming vertical holes by performing a first etch process on the stack layer in a direction from bottom to top, removing the first attached layer, attaching the stack layer in which the vertical holes are formed to the substrate, and performing a second etch process so that each of the vertical holes has a uniform width.