3D Memory Device Stacked Structure for High Density Fabrication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current 3D memory devices face challenges in achieving higher storage capacity within a smaller form factor using conventional processes, as critical dimensions shrink and compatibility limitations are encountered in integrated circuits.
Innovation Solution
A three-dimensional memory device is fabricated using a multi-layer stacked structure with conductive and insulating layers, featuring interconnected channel portions and storage layers, along with a multiple-step etching scheme to increase aspect ratio, allowing for higher density designs compatible with conventional etching tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional process equipment is used to fabricate 3D memory devices, then manufacturing compatibility is maintained, but storage capacity and device density cannot be sufficiently increased
Solution Approach 1:
The memory device is divided into multiple planes stacked vertically, with each plane containing memory cells arranged in a grid pattern. The bit lines are segmented to connect to specific string portions in each plane, enabling independent addressing and operation of different memory planes, thereby achieving high storage capacity while using conventional fabrication processes
Solution Approach 2:
The patent transitions from two-dimensional memory cell arrangement to three-dimensional stacked structure by adding vertical dimension with multiple planes. Bit lines extend vertically to connect to string portions in different planes, enabling increased storage capacity without increasing the footprint area, while maintaining compatibility with conventional planar fabrication processes
2Quantity of substance
If critical dimensions are reduced to increase device density, then storage capacity increases, but manufacturing precision and process control become more difficult
Solution Approach 1:
The device is segmented into discrete planes and string portions that can be independently formed and controlled. Each plane can be fabricated with standard critical dimensions, and the vertical stacking allows density increase without requiring reduction of lateral feature sizes, thus maintaining manufacturing precision
Solution Approach 2:
Conductive plugs serve as intermediary elements connecting bit lines to string portions in different planes. These plugs are formed through controlled deposition and etching processes that use conventional critical dimensions, acting as mediators that enable vertical interconnection without requiring sub-conventional feature sizes
Data Source
AI summary
A three-dimensional memory device includes a substrate, conductive layers and insulating layers, a storage layer, a first channel, a second channel and a first conductive plug. The conductive layers and insulating layers are alternately stacked over the substrate to form a multi-layer stacked structure. The storage layer penetrates through the multi-layer stacked structure, and has a first string portion and a second string portion that are spaced from each other. The first channel is located on a lateral side of the first string portion. The second channel is located on a lateral side of the second string portion. The first channel and the second channel have an upper channel portion and a lower channel portion. The first conductive plug is interconnected between the upper channel portion and the lower channel portion.