3D Memory Staircase Channels That Prevent Pillar Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing memory devices face challenges in reducing the physical area occupied by staircase structures in 3D memory arrays, which limits the inclusion of additional memory levels and increases the physical area, leading to reduced storage capacity and wasted space due to electrical isolation of conductive pillars during the bisecting process.

Innovation Solution

The use of a deposited barrier material, such as nitride, in the bisected channels of the staircase region, with one side implanted with carbon, prevents trench formation and allows for proper bisection while maintaining access to word lines at each level, thereby increasing storage capacity without expanding the physical area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If channels in the staircase region are bisected to reduce the staircase region area, then the storage capacity increases, but conductive pillars become electrically isolated from word lines due to trench formation

Engineering Contradiction:
Improvestorage capacityVSAvoidelectrical connection
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A barrier material is deposited in the channel before bisection to prevent trench formation that would isolate conductive pillars. This preliminary protective action ensures that when the channel is bisected to increase storage capacity, the conductive pillars remain electrically connected to word lines without being isolated by trenches.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The barrier material acts as an intermediary substance between the etching process and the conductive pillar. It prevents the harmful interaction (trench formation) while allowing the beneficial action (channel bisection for increased capacity) to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the staircase region area is reduced by bisecting channels, then more memory levels can be included, but the physical area increases due to trench formation

Engineering Contradiction:
Improvememory levelsVSAvoidphysical area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The barrier material is deposited beforehand to counteract the harmful effect of trench formation during channel bisection. This prevents the physical area from increasing while allowing the channel bisection to proceed for including more memory levels.

Inventive Principle:
Principle #9Preliminary anti-action

3Quantity of substance

If channels are bisected to increase storage capacity, then more memory cells can be accessed, but conductive pillars become uncoupled from word lines

Engineering Contradiction:
Improvestorage capacityVSAvoidelectrical coupling
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The barrier material is deposited in the channel before the bisection process to ensure that when the channel is divided, the conductive pillars remain properly coupled to word lines. This preliminary protective measure simplifies the manufacturing process by preventing electrical isolation issues.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables increased storage capacity in memory devices by preventing trench formation during the bisection of channels, ensuring that conductive pillars remain coupled with word lines, thus enhancing memory storage density without increasing the physical area occupied by the staircase region.

Implementation Method 1

a deposited barrier material, such as nitride, in the bisected channels of the staircase region, with one side implanted with carbon

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Data Source

PatentUS20240021521A1Staircase structures for accessing three-dimensional memory arrays
Publication Date: 2024.01.18 MICRON TECHNOLOGY INC
  • US20240021521A1 patent drawing
  • US20240021521A1 patent drawing
  • US20240021521A1 patent drawing

AI summary

Methods, systems, and devices for staircase structures for accessing three-dimensional (3D) memory arrays are described. A memory system may include an access region (e.g., a staircase region) that includes circuitry for accessing memory cells at respective levels of memory cells. The access region may include a channel through which a conductive pillar may couple a word line at a level of memory cells with decoder circuitry. During manufacture of the memory system, a channel material may be formed in the channel and etched to form a corner portion in the channel. During a partitioning of the channel, a nitride material over the corner portion may be etched and some of the corner portion may remain in the channel, which may prevent formation of a trench that may cause the conductive pillar to be uncoupled from the word line.