3D Memory Staircase Structure for Stable Channel Control
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Solution Overview
Problem
As feature sizes of planar memory cells approach their limits, scaling becomes challenging and costly, and 3D memory architecture is needed to address density limitations, while maintaining mechanical stability and control mechanisms for channel structures during operations like read and erase.
Innovation Solution
A 3D memory device with a stack structure featuring interleaved conductive and dielectric layers forming a staircase structure, where a slit structure cuts off contact landing layers on select conductive layers to enable both 'by finger' and 'by block' control of channel structures, improving mechanical stability and product yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If planar memory cells are scaled to smaller sizes by improving process technology, then memory density increases, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent transitions from planar 2D memory cell architecture to a 3D vertical stack structure with multiple conductive layers and dielectric layers stacked perpendicular to the substrate. This dimensional change allows memory density to increase vertically rather than requiring further lateral scaling, thereby avoiding the manufacturing complexity and cost associated with sub-lithographic feature sizes while achieving higher memory density.
2Stability of the object's composition
If a slit structure cuts off all thickened portions of conductive layers, then mechanical stability improves, but electrical connectivity and control capability are lost
Solution Approach 1:
The patent applies different treatments to different regions of the conductive layers. The slit structure selectively removes thickened portions from some conductive layers (second, third, and fourth layers) while preserving the thickened portion of the first conductive layer. This local differentiation provides mechanical stability where needed while maintaining electrical connectivity and control capability in critical regions, enabling both 'by finger' and 'by block' control mechanisms to function properly.
3Reliability
If thickened portions are added to conductive layers in the staircase structure, then electrical connectivity is improved, but mechanical stability deteriorates
Solution Approach 1:
The patent segments the conductive layers into different functional groups with different structural characteristics. The first conductive layer maintains a continuous thickened portion for reliable electrical connectivity, while the second, third, and fourth conductive layers have their thickened portions selectively removed by the slit structure to improve mechanical stability. This segmentation allows each layer to be optimized for its specific function, achieving both electrical reliability and mechanical stability at different locations in the stack.
Data Source
AI summary
In certain aspects, a three-dimensional (3D) memory device includes a stack structure, and a slit structure extending. The stack structure includes interleaved conductive layers and dielectric layers. Edges of the interleaved conductive layers and dielectric layers define a staircase structure. Each one of the conductive layers has a thickened portion in the staircase structure. The thickened portion extends along a first direction. The slit structure extends through the stack structure and along a second direction perpendicular to the first direction, such that the slit structure cuts off at least one, but not all, of the thickened portions of the conductive layers.