3D Memory Circuit Stairstep Contacts for Stable Gate Replacement
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Solution Overview
Problem
The manufacturing of 3D memory circuits is fragile during the gate replacement process, affecting yield and etching and layout margins due to the removal and replacement of sacrificial layers, particularly in stacked circuit structures with critical dimensions shrinking.
Innovation Solution
A circuit structure with a first and second stack of conductors having stepped arrangements and connecting circuits that include interlayer connectors and through-stack conductors, supported by structural vertical pillars and enlarged vias, providing stability and improved alignment during the gate replacement process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate replacement technique is used to form word lines in 3D memory, then conductive material can replace sacrificial layers to create functional gates, but the circuit structure becomes fragile during manufacturing reducing yield
Solution Approach 1:
The patent introduces a support structure comprising vertical pillars and horizontal beams formed before the gate replacement process. These structures are preliminarily constructed to provide mechanical support to the fragile stacked circuit structure during the subsequent sacrificial layer removal and conductive material deposition, preventing structural collapse and improving manufacturing yield
Solution Approach 2:
The support structure acts as a cushioning framework that absorbs and distributes mechanical stresses during the gate replacement process. The vertical pillars and horizontal beams create a rigid scaffold that protects the delicate stacked conductors and insulating layers from damage during sacrificial layer removal and conductive material filling operations
2Manufacturing precision
If critical dimensions of stacked circuit structures are shrunk to increase density, then higher integration is achieved, but etching and layout margins are reduced affecting manufacturability
Solution Approach 1:
The patent transitions from a planar layout to a three-dimensional stacked architecture with vertical pillars extending through multiple conductor layers. This dimensional change allows circuit elements to be arranged in the vertical dimension, increasing density while maintaining adequate lateral etching and layout margins in the horizontal plane, thus resolving the conflict between density and manufacturing precision
Data Source
AI summary
Circuit structures to improve manufacturing yield in complex 3D circuits have a first stack of conductors and a second stack of conductors having memory regions and contact regions. Conductors of the first stack have stepped arrangement in the contact region to provide landing areas on the conductors. Connecting circuits connect the landing areas of conductive layers in the first stack to through-stack conductors in vias in the second stack, to connect to circuitry below the stack. The memory regions include arrays of vertical memory pillars. The connecting circuits include interlayer connectors contacting landing areas in the first stack, extending to patterned conductors over the first and second stacks. The patterned conductors can include links from interlayer connectors of the first stack to through-stack connectors of the second stack. The circuit structure can include a plurality of structural vertical pillars in the contact region of the first stack.