3D Semiconductor Memory Device Stepwise Contact Fabrication
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Solution Overview
Problem
The challenge is to reduce manufacturing costs and enhance reliability in three-dimensional semiconductor devices while overcoming the limitations of expensive equipment needed for fine pattern formation in two-dimensional semiconductor devices.
Innovation Solution
A method for fabricating three-dimensional semiconductor devices involves forming a layer structure with sequentially stacked layers, a mask structure, and a sacrificial mask pattern to create a stepwise contact structure using a consumable etch mask, which reduces manufacturing costs and improves interconnection reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional or planar semiconductor memory devices are used, then manufacturing process is simpler, but integration is limited by area occupied by unit memory cell and expensive equipment requirements
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically stacked memory cells. Multiple memory cell layers are stacked in the vertical direction, allowing integration scaling without requiring proportional increases in lateral area or pattern fineness. This dimensional change enables higher integration while avoiding the need for increasingly expensive fine pattern forming equipment.
2Productivity
If three dimensional memory devices are implemented to increase integration, then area efficiency improves, but manufacturing cost increases
Solution Approach 1:
The fabrication process is divided into modular stages: forming sacrificial patterns, depositing memory cell layers, removing sacrificial patterns, and repeating the cycle. Each stage uses standard semiconductor processing techniques. The consumable etch mask is formed from previously deposited layers rather than requiring separate mask materials, reducing material costs and process complexity.
Solution Approach 2:
The deposited layers serve multiple functions: they form memory cell structures, provide etch masks for patterning, and act as consumable masks for subsequent etching steps. This multi-functionality eliminates the need for separate mask materials and reduces the number of deposition steps, lowering overall manufacturing cost.
3Ease of manufacture
If conventional patterning methods are used, then process is straightforward, but interconnection reliability is insufficient for three dimensional structures
Solution Approach 1:
A consumable etch mask is introduced as an intermediary element that enables precise patterning of three-dimensional interconnection structures. The mask is formed from deposited layers and sacrificial patterns, providing temporary structural support and definition during etching. After serving its patterning function, the mask is consumed (removed), leaving clean, reliable interconnection structures without requiring complex alignment or multiple patterning steps.
Data Source
AI summary
Provided are a three dimensional semiconductor memory device and a method of fabricating the same. The method includes forming a stepwise structure by using mask patterns and a sacrificial mask pattern formed on the mask patterns as a consumable etch mask.