3D Non-Volatile Memory Device With String Isolation Films
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The downscaling of NAND flash memory devices is hindered by design issues related to reduced sensing margins and disturbances between memory cells in conventional two-dimensional architectures, making it difficult to increase data storage capacity.
Innovation Solution
A 3-dimensional non-volatile memory device design featuring semiconductor pillars arranged in a specific structure with string isolation films and information storage films, allowing for increased data storage capacity through a simplified design modification, including the use of semiconductor pillars with circular arc cross-sections and shared memory strings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional two-dimensional memory cell array architecture is downscaled, then manufacturing cost is reduced, but sensing margin decreases and disturbances between memory cells increase
Solution Approach 1:
The patent transitions from a conventional two-dimensional memory cell array architecture to a three-dimensional architecture where memory cells are stacked vertically. This dimensional change allows continued scaling of storage capacity without further reducing the lateral footprint, thereby maintaining sufficient sensing margins and reducing inter-cell disturbances that plague scaled-down 2D designs.
2Quantity of substance
If number of gate layers is increased in conventional structure, then data storage capacity is increased, but fabrication process becomes more complicated
Solution Approach 1:
Instead of increasing the number of gate layers in the vertical direction within a planar structure, the patent implements a three-dimensional arrangement where memory cells are stacked above each other. This approach increases storage capacity by utilizing the vertical space for cell stacking rather than adding more gate layers to a conventional planar structure, thereby avoiding the associated fabrication complexity.
3Quantity of substance
If single memory cell is formed as multi-bit memory cell, then data storage capacity is increased, but fabrication process becomes more complicated
Solution Approach 1:
The patent divides the memory structure into multiple independent single-bit memory cells stacked vertically, where each cell can be independently controlled and accessed. This segmentation approach allows the memory system to achieve multi-bit storage capacity through parallel operation of multiple cells rather than creating complex multi-bit cells, thereby simplifying the fabrication process while maintaining high storage capacity.
Data Source
AI summary
Provided are a 3-dimensional non-volatile memory device and a method of fabricating the same. The 3-dimensional non-volatile memory device may include a substrate; semiconductor pillars, which are arranged at a certain interval in a first direction and a second direction different from the first direction; a string isolation film, which is arranged between the semiconductor pillars arranged in the first direction among the semiconductor pillars and extends in the first direction and a third direction vertical to the main surface of the substrate; first sub-electrodes repeatedly stacked on the substrate in the third direction; second sub-electrodes, which are electrically isolated from the first sub-electrodes by the string isolation film, and are repeatedly stacked on the substrate in the third direction; and information storage films including a first information storage film and a second information storage film.


