3D Memory Cell Programming Using Sub-Cell Size Information
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Solution Overview
Problem
Existing memory devices face challenges in optimizing and controlling memory cells with asymmetrical sizes, which affect integration and performance.
Innovation Solution
A memory device and storage device that includes memory cells with different sizes, utilizing a sub-memory cell information storage to manage and control first and second sub-memory cells through separate channels and channels, allowing for tailored program operations based on size differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are formed by cutting one channel structure into multiple channels to increase integration degree, then the integration degree of memory cells increases, but the sizes of the memory cells become asymmetrical and difficult to control
Solution Approach 1:
The patent divides the memory cell array into multiple banks, where each bank contains memory cells connected to a specific channel. This segmentation allows independent control and optimization of each bank's memory cells, enabling precise size control even when multiple channels are formed from a single channel structure. The bank-level organization facilitates targeted manufacturing adjustments for each channel without affecting the entire array.
Solution Approach 2:
The patent implements different program operations for different banks based on their specific characteristics. Each bank can be programmed with parameters optimized for its particular memory cell size and channel properties. This local optimization approach allows the system to handle asymmetrical memory cell sizes effectively by tailoring the programming process to each bank's specific requirements rather than using a uniform approach.
2Quantity of substance
If different sized memory cells are used to increase storage capacity, then data storage capacity increases, but uniform program operations cannot be applied to all memory cells
Solution Approach 1:
The patent employs dynamic program operations that can be adjusted based on the specific bank being programmed. The system selects and applies different programming parameters, voltages, and timing sequences depending on the memory cell size and channel characteristics of each bank. This dynamic adaptation enables effective programming of diverse memory cell sizes while maintaining overall system coherence and performance.
Solution Approach 2:
The patent changes programming parameters such as voltage levels, pulse durations, and current magnitudes according to the specific bank's memory cell characteristics. By adjusting these parameters dynamically, the system can optimize programming for both smaller and larger memory cells within the same device, ensuring reliable data storage across the full range of cell sizes without requiring separate devices for different cell dimensions.
Data Source
AI summary
A memory device may include a memory cell array including memory cells stacked in a direction perpendicular to a substrate, each of the memory cells including a first sub-memory cell and a second sub-memory cell having a size larger than a size of the first sub-memory cell, a sub-memory cell information storage configured to store sub-memory cell size information on the sizes of the first sub-memory cell and the second sub-memory cell, a peripheral circuit configured to perform a program operation on a selected sub-memory cell among the memory cells, and a control logic configured to control the peripheral circuit to store data in each of the first sub-memory cell and the second sub-memory cell based on the sub-memory cell size information.