3D Semiconductor Memory Support Patterns for Warpage Control
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Solution Overview
Problem
Three-dimensional semiconductor memory devices face reliability issues due to saddle-type warpage during the formation of trenches, which affects the integration and performance of the memory cells.
Innovation Solution
Incorporating support structures in the peripheral circuit region that extend across the word line cut regions, perpendicular to the direction of the word lines, to reinforce the semiconductor memory device and prevent warpage, thereby enhancing the structural integrity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If trenches are formed in the cell array region to create word lines, then the degree of integration of three-dimensional semiconductor memory devices is increased, but saddle-type warpage occurs during trench formation which deteriorates product reliability
Solution Approach 1:
The support structure is formed in advance before the trench formation process. This preliminary action prevents saddle-type warpage from occurring during subsequent trench formation, allowing high-degree integration to be achieved without compromising product reliability.
Solution Approach 2:
The support structure acts as an intermediary element between the substrate and the trench formation process. It provides mechanical support during trench formation, preventing warpage while allowing the trench to be formed for high-density integration.
2Reliability
If support structures are added to prevent warpage, then product reliability is improved, but device complexity increases
Solution Approach 1:
The support structure is placed locally in the peripheral circuit region rather than throughout the entire device. This localized approach provides necessary warpage prevention while minimizing the increase in overall device complexity.
Solution Approach 2:
The support structure is segmented into a first portion and a second portion, with the first portion having a greater width. This segmentation allows the support structure to provide effective warpage prevention while maintaining a compact design that doesn't excessively increase device complexity.
Data Source
AI summary
Semiconductor memory devices are provided. A semiconductor memory device includes a cell array region including stacked structures and a word line cut region that extends between the stacked structures. Moreover, the semiconductor memory device includes a peripheral circuit region in a stack with the cell array region and including a support pattern.