3D Memory Device with Variable Height Stacks
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Solution Overview
Problem
Current methods for manufacturing three-dimensional memory devices face challenges in efficiently forming memory stack structures with different heights, leading to complex processing steps and increased costs due to mis-landing issues during metal replacement.
Innovation Solution
The approach involves forming an alternating stack of insulating and electrically conductive layers with distinct regions, where all layers are present in one region and only the topmost conductive layer is absent in another, allowing for simplified fabrication by enabling all strings to be reached for metal replacement without additional processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory stack structures with different heights are formed using current manufacturing methods, then device functionality is achieved, but processing complexity increases and costs rise due to mis-landing issues during metal replacement
Solution Approach 1:
The alternating stack is divided into two distinct regions: a first region containing all layers including the topmost conductive layer, and a second region where the topmost conductive layer is absent. This segmentation allows different processing approaches for each region, simplifying the overall manufacturing process while accommodating the need for different height memory stacks.
Solution Approach 2:
Different regions of the alternating stack are given different structural qualities - the first region has complete layer stacks while the second region has truncated stacks. This local differentiation enables tailored processing for each region, avoiding the need for complex mis-landing corrections during metal replacement while maintaining device functionality.
2Manufacturing precision
If additional processing steps are added to handle mis-landing issues, then manufacturing precision improves, but productivity decreases due to increased processing time
Solution Approach 1:
The alternating stack is prepared in advance with two regions of different heights before metal replacement begins. By pre-configuring the stack structure with the second region already having fewer layers, the metal replacement process can proceed without stopping to correct mis-landing issues, thereby maintaining high productivity while ensuring precision.
Solution Approach 2:
Instead of adding post-processing steps to correct mis-landing issues after metal replacement, the invention inverts the approach by pre-configuring the stack structure to prevent mis-landing problems from occurring in the first place. This eliminates the need for additional corrective processing steps.
3Ease of manufacture
If uniform height memory stacks are used, then manufacturing process is simpler, but device versatility is limited for multilevel memory arrays and monolithic structures
Solution Approach 1:
The alternating stack incorporates local quality variations by creating first and second regions with different heights. This allows the structure to accommodate both uniform and non-uniform memory stack configurations within the same device, enabling multilevel memory arrays and monolithic structures while maintaining relatively simple fabrication processes.
Solution Approach 2:
The alternating stack structure serves multiple functions: it can form both full-height and truncated-height memory stacks, support different memory cell configurations, and enable various device architectures including multilevel memory arrays and monolithic structures. This multi-functionality is achieved through the dual-region design that accommodates different height requirements.
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate. The alternating stack includes a first region in which all layers of the alternating stack are present and a second region in which at least a topmost one of the electrically conductive layers is absent. First memory opening fill structures extend through the first region of the alternating stack, and second memory opening fill structures extend through the second region of the alternating stack. The first memory opening fill structures have a greater height than the second memory opening fill structures. Pocket doping regions extending over a respective subset of topmost electrically conductive layers for the memory opening fill structures can be formed to provide higher threshold voltages and to enable selective activation of vertical semiconductor channels connected a same bit line.