3D Memory Cell Layout With Vertical Channels for Higher Density
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Solution Overview
Problem
Conventional two-dimensional semiconductor memory devices have limited integration capacity due to the area occupied by unit memory cells, restricting the increase in memory capacity.
Innovation Solution
A three-dimensional semiconductor memory device is designed with memory cells extending in horizontal and vertical directions, incorporating transistors with nonlinear channel structures, charge storage elements, and interconnected bit and selection lines to enhance integration and capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional memory cell layout is used, then manufacturing process is simple, but integration capacity is limited
Solution Approach 1:
The patent transitions from a conventional two-dimensional memory cell layout to a three-dimensional structure by introducing vertical channel structures that extend in the third dimension. The memory cell includes first and second vertical channel structures rising from the substrate, with charge storage elements positioned between them. This dimensional change allows multiple memory cells to be stacked vertically, significantly increasing integration capacity while maintaining manufacturing feasibility through extended process steps.
2Quantity of substance
If vertical stacking is implemented, then memory capacity increases, but device complexity increases
Solution Approach 1:
The patent merges multiple functional elements into a unified vertical structure. The first and second vertical channel structures are positioned adjacent to each other in the third dimension, sharing common horizontal space. Charge storage elements are merged between these channel structures, and gate lines are combined to control both channels. This merging approach increases memory capacity through vertical stacking while reducing the horizontal footprint and managing structural complexity.
Solution Approach 2:
The vertical channel structures serve multiple functions simultaneously: they act as conduction paths for charge transport, provide structural support for stacking, and enable three-dimensional positioning of memory elements. The gate lines control multiple channels vertically, and the charge storage elements serve both as data storage and as structural separators between channel layers. This multi-functionality increases capacity while managing device complexity.
3Quantity of substance
If nonlinear channel structure is used, then integration density improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the channel structure into distinct first and second vertical channel structures that are separately formed and positioned. Each channel structure can be independently controlled during manufacturing, allowing for better precision management. The segmentation into discrete vertical elements with defined spacing enables integration density improvement while maintaining manufacturability through controlled separation of formation steps.
Data Source
AI summary
A semiconductor memory device includes a memory cell that extends in a first horizontal direction, a second horizontal direction that intersects the first horizontal direction, and a vertical direction. The memory cell includes a first transistor including a first channel structure, a second transistor including a second channel structure, a charge storage element electrically connected to a first end of the second channel structure and adjacent to the first channel structure a first bit line electrically connected to a first end of the first channel structure and that extends in the second horizontal direction, a selection line electrically connected to a second end of the first channel structure and that extends in the second horizontal direction, a second bit line electrically connected to a second end of the second channel structure and that extends in the second horizontal direction, and a gate line that extends in the vertical direction.