3D Memory Isolation Structure With Vortex Ends for Misalignment Control
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Solution Overview
Problem
The existing fabrication methods for 3D nonvolatile memory devices face challenges in achieving reliable operation and preventing damage during the isolation process, particularly due to misalignment issues that can lead to abnormal conductive paths and structural damage.
Innovation Solution
A semiconductor device with a stacked structure of dielectric and conductive layers, featuring a unique isolation structure comprising a first and second isolation structure with a vortex shape at their ends, which are designed to prevent overlap and misalignment, thereby isolating the structure into blocks and ensuring accurate alignment during the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional isolation structures are used in 3D nonvolatile memory devices, then the fabrication process is simpler, but misalignment occurs leading to abnormal conductive paths and structural damage
Solution Approach 1:
The isolation structure employs asymmetric geometry where the first isolation structure has a first width and the second isolation structure has a second width different from the first. This asymmetric design prevents misalignment between adjacent isolation structures, eliminating abnormal conductive paths while maintaining fabrication simplicity
Solution Approach 2:
The isolation structures are designed with predetermined widths and positioning before the fabrication process begins. The first isolation structure is formed with a first width and the second with a second width, establishing alignment references in advance that prevent misalignment during subsequent fabrication steps
2Manufacturing precision
If the isolation structure is formed to prevent misalignment, then alignment accuracy improves, but the device complexity increases
Solution Approach 1:
By using asymmetric widths for adjacent isolation structures rather than identical symmetric designs, the patent achieves superior alignment accuracy without requiring complex multi-layer or multi-step isolation systems. The simplicity of the asymmetric design actually reduces overall device complexity compared to conventional approaches
Solution Approach 2:
The isolation structure is segmented into multiple discrete isolation structures with different widths, where each segment serves a specific alignment function. This segmentation allows independent optimization of each isolation structure's width to prevent misalignment, achieving high precision without monolithic complexity
Data Source
AI summary
A semiconductor device includes: a stacked structure comprising a plurality of dielectric layers and a plurality of conductive layers, wherein the dielectric layers are alternately stacked with the conductive layers; a groove formed for each conductive layer by recessing the conductive layer to the inside of the stacked structure; and an isolation structure formed through the stacked structure so as to isolate the stacked structure into a first block and a second block. The isolation structure comprises a first isolation structure and a second isolation structure adjacent to the first isolation structure with a gap provided between the first and second isolation structures, and one end of the first isolation structure and the other end of the second isolation structure, which face each other, have a vortex shape when viewed from above.