3D Memory Device Warpage Suppression via Segmented Gate Lines
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Solution Overview
Problem
The manufacturing of high-density three-dimensional non-volatile memory devices faces challenges due to the difficulty in managing the height of vertical memory cell strings, which can lead to warpage issues in conductive patterns.
Innovation Solution
A method involving a multilayered structure with alternately stacked material layers, forming a multi-step structure, creating vertical support layers, and filling recesses with conductive material to form gate lines and contact plugs, while using interlayer insulating layers to manage warpage and ensure proper alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the height of vertical memory cell strings is increased to achieve high-density memory, then storage capacity is improved, but warpage of conductive patterns occurs making manufacturing difficult
Solution Approach 1:
The conductive layer is divided into multiple segments corresponding to different height regions of the vertical memory cell strings. Each segment is selectively removed to form contact holes at appropriate depths, preventing warpage while maintaining high storage capacity. The conductive layer is segmented both vertically (multiple layers at different heights) and horizontally (different regions with different removal depths), allowing precise control over contact hole formation.
2Quantity of substance
If the height of vertical memory cell strings is increased, then storage capacity is improved, but manufacturing complexity increases
Solution Approach 1:
Different regions of the conductive layer are treated differently during the etching process. The conductive layer is selectively removed to different depths in different regions, with some regions having contact holes formed deeper than others. This local differentiation allows the manufacturing process to accommodate varying height requirements across the device while maintaining a relatively simple overall process flow.
Solution Approach 2:
The conductive layer is formed as a continuous layer before any contact holes are created. This preliminary formation of the complete conductive structure allows subsequent selective removal processes to proceed without requiring complex step-by-step construction, simplifying the overall manufacturing sequence while achieving the desired high-density structure.
Data Source
AI summary
The present disclosure provides a method of manufacturing a three dimensional memory device to suppress warpage of conductive patterns. The method may include providing a multilayered structure in which different material layers are alternately stacked over a substrate, etching partially the material layers to form a multi-step structure, each step being formed of at least one pair of the material layers, forming vertical support layers, each support layer being disposed on a top face of each step, removing partially the material layers to form recesses, filling the recesses with a conductive material to form gate lines, the gate line defining an upper portion of the step, and forming vertical contact plugs respectively on the upper portion of the step.