3D Nonvolatile Memory Block Width Reduction via Segmented Wiring

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Two-dimensional nonvolatile memory devices have reached memory cell density limits, necessitating a three-dimensional arrangement to enhance integration, but existing three-dimensional designs face challenges in minimizing the width of memory blocks due to the number and arrangement of wiring lines.

Innovation Solution

A three-dimensional nonvolatile memory device configuration with a substrate featuring a slimming region between pass regions, where word lines are stacked and coupled with pass transistors via wiring lines, allowing for reduced wiring line count and dispersion across both sides of the slimming region, thereby minimizing the memory block width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are arranged three-dimensionally to enhance integration, then memory cell density is improved, but device complexity increases

Engineering Contradiction:
Improvememory cell densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from two-dimensional to three-dimensional memory cell arrangement by stacking multiple word lines vertically over the cell region. This enables increased memory cell density by utilizing the vertical dimension, with memory cells formed at intersections of word lines and bit lines in multiple layers

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The memory device is segmented into distinct functional regions: cell region, slimming region, and first/second pass regions. This segmentation allows independent optimization of each region, managing complexity by dividing the three-dimensional structure into manageable sections with specific functions

Inventive Principle:
Principle #1Segmentation

2Reliability

If wiring lines are arranged to electrically couple word lines with pass transistors, then electrical connectivity is improved, but memory block width increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmemory block width
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

Wiring lines are routed in three-dimensional space rather than confined to a single plane. First wiring lines extend from the slimming region to the first pass region, while second wiring lines extend to the second pass region, utilizing vertical and lateral dimensions to achieve connectivity without increasing memory block width

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The wiring system is segmented into first wiring lines and second wiring lines that connect to different pass regions on opposite sides of the slimming region. This segmentation distributes the wiring load and enables compact arrangement by routing connections through different spatial paths

Inventive Principle:
Principle #1Segmentation

3Reliability

If pad portions are formed on word lines in the slimming region, then electrical coupling capability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical coupling capabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Pad portions are formed on word lines during the manufacturing process before final wiring connections are established. This preliminary formation of pad portions simplifies subsequent wiring steps by providing pre-positioned connection points, reducing overall manufacturing complexity despite the three-dimensional structure

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9553106B1Three-dimensional nonvolatile memory device
Publication Date: 2017.01.24 SK HYNIX INC
  • US9553106B1 patent drawing
  • US9553106B1 patent drawing
  • US9553106B1 patent drawing

AI summary

A three-dimensional nonvolatile memory device includes a substrate defined with a slimming region, first and second pass regions on both sides of the slimming region, and a cell region adjacent to the slimming region with the first pass region interposed therebetween; a word line stack including a plurality of word lines stacked over the cell region, the first pass region, and the slimming region of the substrate; first wiring lines extending from the slimming region to the first pass region and electrically coupling some word lines with pass transistors formed in the first pass region of the substrate; and second wiring lines extending from the slimming region to the second pass region and electrically coupling remaining word lines, other than the some word lines, with pass transistors formed in the second pass region of the substrate.