3D Memory Word Line Patterning for Aspect Ratio Stability
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Solution Overview
Problem
Current semiconductor memory technologies face challenges in maintaining aspect ratio during manufacturing, which can lead to structural instability and defects, such as twisting or collapsing of features, affecting memory cell density and device performance.
Innovation Solution
A multiple-patterning process is employed to form word lines and transistors, where first and second subsets are formed in separate patterning processes, maintaining an aspect ratio between 5 to 15 to prevent structural issues while enhancing memory cell density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single patterning process is used to form word lines and transistors, then the manufacturing process is simpler, but the aspect ratio cannot be controlled, leading to structural instability and defects
Solution Approach 1:
The patent divides the patterning process into multiple stages, forming first word lines and transistors in a first patterning process, then forming second word lines and transistors in a second patterning process. This segmentation allows each stage to maintain proper aspect ratio while achieving complete coverage, resolving the contradiction between process simplicity and aspect ratio control.
Solution Approach 2:
The patent performs preliminary patterning actions to form initial word lines and transistors, then uses these as a basis for subsequent patterning steps. This preliminary action enables better control of aspect ratio in each stage while building toward the final complete structure.
2Productivity
If higher memory cell density is achieved, then device performance improves, but structural instability and defects increase due to poor aspect ratio control
Solution Approach 1:
The patent extends the memory array in multiple directions by performing additional patterning processes, adding dimensions to the structure. This allows increased memory cell density while maintaining proper aspect ratio in each patterning stage, thereby preserving structural stability.
3Stability of the object's composition
If aspect ratio is maintained between 5 to 15, then structural stability is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent changes the patterning process parameters by dividing it into multiple stages with specific aspect ratio targets (5 to 15) for each stage. This parameter change maintains structural stability while managing overall process complexity through systematic multi-stage fabrication.
Data Source
AI summary
A semiconductor device and method of manufacture are provided. In embodiments a memory array is formed by manufacturing portions of a word line during different and separate processes, thereby allowing the portions formed first to act as a structural support during later processes that would otherwise cause undesired damage to the structures.


