3D Memory Block Control for Not-Open String Write Interference

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Solution Overview

Problem

3D memory devices face challenges with not-open strings (N/O strings) that hinder data writing and adversely affect neighboring cells, despite ECC application, necessitating a solution to minimize their negative impacts.

Innovation Solution

A memory system with a memory controller that applies different control schemes to memory blocks based on the presence of N/O strings, including data conversion and voltage restriction to mitigate the effects of N/O strings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction coding (ECC) is applied to data in memory cells of not-open strings, then data storage capability is improved, but writing data remains difficult and adverse effects on neighboring cells persist

Engineering Contradiction:
Improvedata storage capabilityVSAvoiddata writing capability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The memory block is divided into multiple sub-blocks based on N/O string distribution. Sub-blocks with high N/O string density are separated from those with low density, allowing different write strategies to be applied to each segment. This segmentation enables targeted handling of problematic areas while maintaining normal operations in healthy regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different write voltage schemes are applied to different sub-blocks based on their local N/O string characteristics. Sub-blocks with high N/O string density receive restricted write voltage applications, while sub-blocks with low N/O string density receive normal write voltages. This local quality approach optimizes writing capability for each region's specific conditions.

Inventive Principle:
Principle #3Local quality

2Reliability

If write voltage is applied multiple times to memory cells in not-open strings, then data writing attempts are made, but the adverse effects on neighboring memory cells increase

Engineering Contradiction:
Improvedata writing attemptVSAvoidadverse effects on neighboring cells
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The system performs preliminary detection of N/O strings before write operations and pre-classifies memory blocks into sub-blocks based on N/O string density. This preliminary anti-action prevents excessive write voltage applications to problematic cells by identifying them in advance, thereby preventing the harmful effects on neighboring cells before they occur.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent applies a restricted number of write voltage applications to sub-blocks with high N/O string density, rather than attempting multiple writes as would be done for normal cells. This partial action approach accepts that some data writing may fail in problematic regions but prevents the excessive write attempts that would cause harm to neighboring healthy cells.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If uniform control scheme is applied to all memory blocks, then control logic is simplified, but performance is not optimized for blocks with different N/O string characteristics

Engineering Contradiction:
Improvecontrol logic complexityVSAvoidmemory operation performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The control system dynamically adapts the write voltage scheme based on the detected N/O string characteristics of each sub-block. Rather than using a static uniform control scheme, the system adjusts its behavior in real-time based on the specific conditions of each memory region, optimizing performance for each block's characteristics while maintaining manageable control complexity through automated classification.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12474874B2Memory device, memory controller, and memory system including the same
Publication Date: 2025.11.18 SAMSUNG ELECTRONICS CO LTD
  • US12474874B2 patent drawing
  • US12474874B2 patent drawing
  • US12474874B2 patent drawing

AI summary

A memory system includes a first memory device including a plurality of first memory blocks each including a plurality of first memory cells stacked in a direction perpendicular to a substrate; and a memory controller configured to control a memory operation of the first memory device. The memory controller is configured to select and operate any one of different control schemes for each of the first memory blocks based on a number of first not-open (N/O) strings included in each of the first memory blocks, respectively.