3D MIM Decoupling Capacitor Structure for Higher Capacitance Control

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Solution Overview

Problem

Conventional metal-insulator-metal (MIM) capacitors in integrated circuits face challenges in controlling inter-metal layer thickness, leading to high variation in capacitance, which is difficult to achieve the desired target value.

Innovation Solution

The implementation of a metal-insulator-metal (MIM) capacitor structure within an integrated Fan-Out (InFO) package, where the insulation layer surrounds both electrodes, and the capacitor is fabricated simultaneously with other package features, using a molding compound with high dielectric constant to reduce thickness and increase capacitance without increasing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the area of the capacitor is increased to increase capacitance, then the capacitance value increases, but the chip area required increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidchip area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent transitions from conventional planar capacitor structures to a vertical three-dimensional configuration where the capacitor extends through multiple inter-metal layers in the vertical dimension. This allows capacitance to be increased by utilizing the vertical space within the chip package rather than expanding the horizontal chip area, effectively resolving the contradiction between capacitance quantity and chip area occupation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the thickness of the inter-metal layer is increased to increase capacitance, then the capacitance value increases, but the control precision of the thickness becomes more difficult

Engineering Contradiction:
ImprovecapacitanceVSAvoidinter-metal layer thickness control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent changes the controlling parameter for capacitance from inter-metal layer thickness to the vertical extent or height of the capacitor structure spanning multiple layers. This parameter change allows for better manufacturing control because the vertical dimension can be more precisely controlled through deposition and etching processes compared to controlling the thickness of individual thin inter-metal layers

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If the dielectric constant (k) of the insulation layer is increased to increase capacitance, then the capacitance value increases, but the manufacturing complexity increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs the molding compound material to serve multiple functions: it acts as the dielectric layer for the capacitor, provides structural support for the package, and enables the vertical formation of the capacitor structure. By making the molding compound serve these multiple purposes, the patent achieves high dielectric constant benefits without proportionally increasing manufacturing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for more precise control of capacitance, reducing variations and achieving higher capacitance values efficiently while maintaining low manufacturing costs by integrating the MIM capacitor within the InFO package structure.

Implementation Method 1

the capacitor is fabricated simultaneously with other package features, using a molding compound with high dielectric constant to reduce thickness and increase capacitance

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS11908788B23D IC decoupling capacitor structure and method for manufacturing the same
Publication Date: 2024.02.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11908788B2 patent drawing
  • US11908788B2 patent drawing
  • US11908788B2 patent drawing

AI summary

A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer, a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer; a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.